R6907ZOV361RA205 datasheet, PDF

R6907ZOV361RA205: DescriptionVaristor, 638V, 205J, Through Hole Mount, RADIAL LEADED; CategoryPassive components The resistor; File Size2MB，1 Pages; ManufacturerMaida Development Company

Download Datasheet Parametric View All

R6907ZOV361RA205 Overview

Varistor, 638V, 205J, Through Hole Mount, RADIAL LEADED

Parameter Name	Attribute value
Maker	Maida Development Company
package instruction	RADIAL LEADED
Reach Compliance Code	compliant
ECCN code	EAR99
Circuit maximum DC voltage	638 V
Circuit RMS maximum voltage	360 V
Maximum energy absorption capacity	205 J
JESD-609 code	e3
Manufacturer's serial number	R69
Installation features	THROUGH HOLE MOUNT
Number of terminals	2
Minimum operating temperature	-40 °C
Package shape	RECTANGULAR PACKAGE
Rated temperature	85 °C
Resistor type	VARISTOR
surface mount	NO
Terminal surface	TIN
Terminal location	RADIAL
Terminal shape	WIRE

Power supply design that achieves low leakage current while ensuring EMI performance Haha, look at it·: Power supply design that achieves low leakage current while maintaining EMI performance[ Print ][ Return ]在AC-DC开关电源中，漏电流最主要的来源是Y类电容。通过使用变压器屏蔽绕组或在输入级加入一个扼流圈，可以显著地降低Y电容的数值或在某些场合去除它，从而降低漏电流并且仍满足有一定裕量的传导...; fighting Analog electronics

Demystifying low Iq: How to design near 100% duty cycle for ultra-low power applications using WEBENCH: Many battery-powered applications require a buck converter to operate at 100% duty cycle, where V IN is close to V OUT , to extend battery life when the battery voltage reaches its minimum value. For ...; alan000345 TI Technology Forum

Graduation project needs advice: I am a senior in college. I don't know what to do for my graduation project in communication engineering. I would like some advice from an expert....; ZF追风 DIY/Open Source Hardware

HDMI application market has broad prospects: High-Definition Multimedia Interface (HDMI) has become a widely used interface standard for digital televisions and consumer electronics products, bringing high-quality experience to home entertainmen...; rain MCU

Please tell me how to use logic circuit to generate such timing: As shown in the figure below, A and B are inputs, and C is output. After B generates a high level, C outputs a high level at the rising edge of A. C outputs a low level at the rising edge of B. If B m...; littleshrimp FPGA/CPLD

TPS5430 12V input 5V output is too low: [i=s]This post was last edited by liunixy on 2019-6-5 19:23[/i]As shown in the figure above, the input is 12V and the designed output is 5V, but the actual output voltage is only about 3V when no load...; liunixy Power technology

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components