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FS0204MA00AM

Description
Silicon Controlled Rectifier,
CategoryAnalog mixed-signal IC    Trigger device   
File Size408KB,6 Pages
ManufacturerFagor Electrónica
Environmental Compliance
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FS0204MA00AM Overview

Silicon Controlled Rectifier,

FS0204MA00AM Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerFagor Electrónica
package instruction,
Reach Compliance Codecompliant
JESD-609 codee3
Humidity sensitivity level3
Peak Reflow Temperature (Celsius)260
Terminal surfaceMatte Tin (Sn)
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger device typeSCR

FS0204MA00AM Preview

FS02...A
SENSITIVE GATE SCR
On-State Current
Gate Trigger Current
1.25 Amp
<
200 µA
Off-State Voltage
400 V ÷ 800 V
FEATURES
• Glass/passivated die junctions
• Low current SCR
• Low thermal resistance
• High surge current capability
• Low forward voltage drop
• Solder dip 260ºC, 10s
• Component in accordance to RoHS 2011/65/EU
and WEEE 2002/96/EC
• Meets MSL level 3, per J-STD-020, LF maximum
peak of 260º C
MECHANICAL DATA
• Case
:
(TO92). Epoxy meets UL 94V-0
flammability rating.
• Polarity
:
As marked on the body.
• Terminals
:
Matte tin plated leads, solderable per
MIL-STD-750 Method 2026, J-STD-002 and JESD22-B102.
Consumer grade, meets JESD 201 class 1A whisker test.
TYPICAL APPLICATIONS
Thanks to highly sensitive triggering levels, the FS04xxxA SCR
series is suitable for all applications where available gate
current is limited, such as ground fault circuit interruptors, pilot
circuits in solid state relays, stand-by mode power supplies,
smoke and alarm detectors.
TO92
K
G
A
A
G
K
Maximun Ratings and Electrical Characteristics at 25°C
SYMBOL
PARAMETER
On-state Current
Average On-state Current
Non-repetitive On-State Current
Non-repetitive On-State Current
Fusing Current
Peak Gate Current
Peak Gate Dissipation
Gate Dissipation
Operating Temperature
Storage Temperature
Soldering Temperature
PARAMETER
Repetitive Peak Off State Voltage
10s max.
CONDITIONS
180 ° Conduction Angle, T
c
= 115 °C
Half Cycle,
Q
= 180 º, T
c
= 115 °C
Half Cycle, 60 Hz
Halfl Cycle, 50 Hz
t
p
= 10 ms, Half Cycle
20 µs max.
20 µs max.
20ms max.
Value
1.25
0.8
25
22.5
2.5
1.2
3
0.2
(-40 to +125)
(-40 to +150)
260
VOLTAGE
D
400
M
600
N
800
Unit
A
A
A
A
A
2
s
A
W
W
°C
°C
°C
Unit
V
I
T(RMS)
I
T(AV)
I
TSM
I
TSM
I
2
t
I
GM
P
GM
P
G(AV)
T
j
T
stg
T
sld
SYMBOL
CONDITIONS
R
GK
= 1 k
W
Revision: 1
V
DRM
V
RRM
www.fagorelectronica.com
Document Name: fs02asg
Version: Jan-17
Page Number: 1/6
FS02...A
SENSITIVE GATE SCR
Electrical Characteristics at Tamb = 25 °C
SYMBOL
PARAMETER
Gate Trigger Current
Gate Trigger Voltage
Gate Non Trigger Voltage
CONDITIONS
V
D
= 12 V
DC
,
R
L
= 140
W
.
T
j
= 25 ºC
V
D
= 12 V
DC
,
R
L
= 140
W
,
T
j
= 25 ºC
V
D
= V
DRM
,
R
L
= 3.3k
W
,
R
GK
=
220
W
T
j
= 125 ºC
I
R G
= 10µA,
MIN
MAX
MAX
MIN
MIN
MAX
MAX
MIN
MIN
SENSITIVITY
01
1
20
200
0.8
0.1
8
5
6
15
10
50
1.45
0.95
400
500
5
60
150
2
1.45
30
30
02
03
20
200
04
15
50
Unit
µA
V
V
V
mA
mA
V/µs
A/µs
V
V
m
W
µA
µA
ºC/W
ºC/W
I
GT
V
GT
V
GD
V
R GM
Reverse Gate Voltage
I
H
Holding Current
I
L
Latching Current
dV / dt
Critical Rate of Voltage Rise
dI / dt
V
TM
V
t 0
r
d
I
T
= 50 mA, R
GK
= 1k
W
T
j
= 25 ºC
I
G
= 1 mA, R
GK
= 1 k
W
V
D
= 0.67 x V
DRM
,
R
GK
=1 k
W
,
T
j
= 125 ºC
Critical Rate of Current Rise I
G
= 2 x I
GT
tr
£
100 ns, f = 60 Hz,
T
j
= 125 ºC
On-state Voltage
Threshold Voltage
Dynamic resistance
at I
T
= 2.5 Amp, tp = 380 µs, T
j
= 25 ºC
MAX
T
j
= 125 ºC
Tj = 125 ºC
V
D
=
V
DRM
,
R
GK
= 1k
W
V
R
= V
RRM
,
Tj = 125 ºC
Tj = 25 ºC
MAX
MAX
MAX
MAX
I
DRM
/ I
RRM
Off-State Leakage Current
R
th(j-c)
R
th(j-a)
Thermal Resistance
Junction-Case for DC
for AC 360 º conduction angle
S =1cm 2
Thermal
Resistance
Junction-Amb for DC
Part Number Information
F
FAGOR
SCR
CURRENT
CASE
VOLTAGE
SENSITIVITY
S
02
02
D
A
00 BU
PACKAGING
FORMING
www.fagorelectronica.com
Document Name: fs02asg
Revision: 1
Version: Jan-17
Page Number: 2/6
FS02...A
SENSITIVE GATE SCR
Ordering information
PREFERRED P/N
FS0202DA 00AM
FS0202DA 00BU
PACKAGE CODE
AM
BU
DELIVERY MODE
AMMO
BULK
BASE QUANTITY
2,000
10,000
UNIT WEIGHT (g)
0.2
0.2
Package Outline Dimensions: (mm)
TO92
REF.
DIMENSIONS
Milimeters
Min.
Typ.
Max.
0.90
4.40
2.34
1.07
4.40
12.70
3.40
1.30
0.38
0.33
1.20
4.60
2.54
1.27
4.60
14.10
3.60
1.50
0.44
0.41
1.50
4.80
2.74
1.47
4.80
15.50
3.86
1.70
0.51
0.51
A
D
C
b
G
B
Test sort name
Week code
H
MC
XXXA
WWY
Marking code
Format type
a
E
Year code
F
A
B
C
D
E
F
G
H
a
b
TO92 (AMMO)
A
Marking code
a
MC
XXXA
WWY
Format type
REF.
A
B
C
D
E
F
G
H
a
b
DIMENSIONS
Milimeters
Min.
Typ.
Max.
0.90
4.40
4.96
2.42
4.40
12.70
3.40
1.30
0.38
0.33
1.20
4.60
5.08
2.54
4.60
14.10
3.60
1.50
0.44
0.41
1.50
4.80
5.20
2.66
4.80
15.50
3.86
1.70
0.51
0.51
B
Test sort name
D
C
b
G
Week code
E
Year code
F
www.fagorelectronica.com
Document Name: fs02asg
Revision: 1
Version: Jan-17
Page Number: 3/6
FS02...A
SENSITIVE GATE SCR
Ratings and Characteristics
(Ta 25 ºC unless otherwise noted)
Fig. 1: Maximum average power dissipation
versus average on-state current
P (W)
1
0.8
0.6
0.4
0.2
0
360°
a
Fig. 2: Average and D.C. on-state current
versus case temperature
I T(AV) (A)
DC
1.5
1.2
0.9
0.6
0.3
0
a
= 180 º
T lead (ºC)
0
0.2 0.4
0.6
0.8
1.0
1.2 1.4
0
20
40
60
80
100
120 140
Fig. 3: Relative variation of thermal impedance
junction to case versus pulse duration
[Zth(j-c) / Rth (j-c)]
1.0
Fig. 4: Relative variation of gate trigger
current, holding and latching current versus
junction temperature
2.0
1.8
1.6
I GT
I
GT
, I
H
(Tj) / I
GT
, I
H
(Tj = 25 ºC)
0.5
1.4
1.2
1.0
0.8
IH & IL
0.2
0.6
0.4
0.2
0.1
1E-3
tp (s)
1E-2
1E-1
1E+0
0.0
-40 -20 0
Tj (ºC)
20 40 60
80 100 120 140
Fig. 5: Relative variation of holding current
versus gate-cathode resistance (typical values).
I
H
[R
GK
] / I
H
[R
GK
= 1k
W
]
5
Tj=25 ºC
Fig. 6: Relative variation of dV/dt immunity
versus gate-cathode resistance (typical values).
10.00
dV/dt [R
GK
] / dV/dt [R
GK
= 220
W
]
Tj = 125°C
VD = 0.67xV
DRM
4
1.00
3
2
0.10
1
RGK=(kW)
RGK=(kW)
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
0
1E-2
1E-1
1E+0
1E-1
0.01
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Document Name: fs02asg
Revision: 1
Version: Jan-17
Page Number: 4/6
FS02...A
SENSITIVE GATE SCR
Ratings and Characteristics
(Ta 25 ºC unless otherwise noted)
Fig. 7: Relative variation of dV/dt immunity
versus gate-cathode resistance (typical values).
Fig. 8: Non repetitive surge peak on-state
current versus number of cycles.
I TSM (A)
10
35
VD = 0.67 x V
DRM
Tj = 125 ºC
R
GK
= 220
W
30
25
20
15
10
Tj initial = 25 ºC
f = 50Hz
8
6
4
2
Cgk(nF)
5
0
1
10
100
1000
0
Number of cycles
0 2 4 6 8 10 12 14 16 18 20 22
Fig. 9: Non repetitive surge peak on-state
current for a sinusoidal pulse with width:
tp < 10 ms, and corresponding value of I
2
t.
ITSM(A). I
2
t (A
2
s)
100
Tj initial = 25 ºC
Fig. 10: On-state characteristics (maximum
values)
ITM(A)
50
Tj max
V
T(O)
= 0.95 V
r
d
= 400m
W
ITSM
10
Tj =Tj max
10
1
I
2
t
Tj 25 ºC
1
1
2
5
10
tp(ms)
0.1
0
0.5
1
1.5
2
2.5
3
3.5
4
VTM(V)
www.fagorelectronica.com
Document Name: fs02asg
Revision: 1
Version: Jan-17
Page Number: 5/6

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Description Silicon Controlled Rectifier, Silicon Controlled Rectifier, Silicon Controlled Rectifier, Silicon Controlled Rectifier, Silicon Controlled Rectifier, Silicon Controlled Rectifier, Silicon Controlled Rectifier, Silicon Controlled Rectifier, Silicon Controlled Rectifier,
Is it Rohs certified? conform to conform to conform to conform to conform to conform to conform to conform to conform to
Maker Fagor Electrónica Fagor Electrónica Fagor Electrónica Fagor Electrónica Fagor Electrónica Fagor Electrónica Fagor Electrónica Fagor Electrónica Fagor Electrónica
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant compliant compliant
JESD-609 code e3 e3 e3 e3 e3 e3 e3 e3 e3
Humidity sensitivity level 3 3 3 3 3 3 3 3 3
Peak Reflow Temperature (Celsius) 260 260 260 260 260 260 260 260 260
Terminal surface Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn)
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Trigger device type SCR SCR SCR SCR SCR SCR SCR SCR SCR

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