UNISONIC TECHNOLOGIES CO., LTD
LM4863
DUAL 2.2W AUDIO AMPLIFIER
PLUS STEREO HEADPHONE
FUNCTION
DESCRIPTION
The UTC
LM4863
is a dual bridge-connected audio power
amplifier. It combines dual bridge speaker amplifiers and stereo
headphone amplifiers on one chip to simplify audio system design.
In addition, the headphone input pin allows the amplifiers to
operate in single-ended mode when driving stereo headphones.
The IC could deliver different power by packages as below (when
connected to a 5V supply with less than 1.0% THD+N.):
-
HTSSOP-20, 4Ω load: 2.2W
-
HTSSOP-20, 3Ω load: 2.5W(with forced-air cooled)
-
SOP/DIP
, 8Ω load: 1.1W.
The UTC
LM4863
features an externally controlled, low-power
consumption shutdown mode, a stereo headphone amplifier mode,
and thermal shutdown protection. It also utilizes circuitry to reduce
“clicks and pops” during device turn-on.
CMOS IC
*Pb-free plating product number: LM4863L
FEATURES
* “Click and pop” suppression circuitry
* Thermal shutdown protection circuitry
* Unity-gain stable
* Stereo headphone amplifier mode
ORDERING INFORMATION
Ordering Number
Package
Normal
Lead Free Plating
LM4863-D16-T
LM4863L-D16-T
DIP-16
LM4863-S18-R
LM4863L-S18-R
SOP-18
LM4863-S18-T
LM4863L-S18-T
SOP-18
LM4863-N20-R
LM4863L-N20-R HTSSOP-20
LM4863-N20-T
LM4863L-N20-T HTSSOP-20
Packing
Tube
Tape Reel
Tube
Tape Reel
Tube
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QW-R107-027.D
LM4863
PIN CONFIGURATION
DIP-16
SHUTDOWN
GND
+OUT A
V
DD
-OUT A
-IN A
GND
+IN A
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
HP-IN
GND
+OUT B
V
DD
-OUT B
-IN B
BYPASS
+IN B
SHUTDOWN
GND
+OUT A
V
DD
-OUT A
-IN A
GND
+IN A
GND
1
2
3
4
5
6
7
8
9
SOP-18
18
17
16
15
14
13
12
11
10
CMOS IC
HP-IN
GND
+OUT B
V
DD
-OUT B
-IN B
BYPASS
+IN B
GND
PIN DESCRIPTION
PIN NO.
DIP-16 SOP-18 HTSSOP-20
4,13
10
1
16
8
6
3
5
9
11
14
12
4,15
12
1
18
8
6
3
5
11
13
16
14
4,17
14
1
20
8
6
3
5
13
15
18
16
2,7,15 2,7,9,10,17 2,7,9,10,11,12,19
PIN NAME
V
DD
GND
BYPASS
SHUTDOWN
HP-IN
+INA
-INA
+OUTA
-OUTA
+INB
-INB
+OUTB
-OUTB
I/O
-
-
-
I
I
I
I
O
O
I
I
O
O
Supply voltage
PIN DESCRIPTION
Ground
Internal mid-supply bias reference bypassing
Entire IC into the shutdown mode when this pin connected
to the V
DD
Output mode select, connected to the V
DD
for SE mode or
GND for BTL mode
Non-inverting input of channel A, connected to BYPASS pin
inside the IC
Inverting input of channel A
Channel A + output in BTL mode, high impedance in SE
mode
Channel A - output in BTL mode, + output in SE mode
Non-inverting input of channel B, connected to BYPASS pin
inside the IC
Inverting input of channel B
Channel B + output in BTL mode, high impedance in SE
mode
Channel B - output in BTL mode, + output in SE mode
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QW-R107-027.D
LM4863
ABSOLUTE MAXIMUM RATINGS
PARAMETER
CMOS IC
SYMBOL
RATINGS
UNIT
Supply Voltage
V
DD
6.0
V
Recommended Supply Voltage Range
V
DD
2.0 ~ 5.5
V
Input Voltage
V
IN
-0.3 ~ V
DD
+0.3
V
Power Dissipation
P
D
Internally limited
Junction Temperature
T
J
+125
℃
Operating Temperature
T
OPR
-40 ~ +85
℃
Storage Temperature
T
STG
-65 ~ +150
℃
Note Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
THERMAL DATA
PARAMETER
Thermal resistance (Junction to Ambient)
SOP-18
DIP-16
HTSSOP-20
SOP-18
DIP-16
HTSSOP-20
SYMBOL
θ
JA
RATINGS
90
63
90
2
20
2
UNIT
℃/W
℃/W
℃/W
℃/W
℃/W
℃/W
Thermal resistance (Junction to Case)
θ
JC
ELECTRICAL CHARACTERISTICS
(
Notes 1
)
(V
DD
=5V, Ta =25
℃
, unless otherwise specified)
PARAMETER
FOR ENTIRE IC
Supply Voltage
High
Low
Quiescent Power Supply Current
(Note 2)
Shutdown Current
FOR BRIDGED-MODE OPERATION
Output Offset Voltage
Headphone Input Voltage
HTSSOP-20
P
OUT
THD+N=10%, f=1kHz
SYMBOL
V
DD
V
IH
V
IL
I
DD
I
SD
V
IN
=0V, I
OUT
=0A, HP-IN=0V
V
IN
=0V, I
OUT
=0A, HP-IN=4V
V
DD
applied to the SHUTDOWN pin
TEST CONDITIONS
MIM TYP MAX UNIT
2
4
6
2
11.5
5.8
0.7
5
2.5
2.2
3.2
2.7
1.1
1.5
0.34
0.3
0.3
67
90
98
5.5
0.8
20
V
V
V
mA
µA
50
mV
W
V
O(OFF)
V
IN
=0V
THD=1%, f=1kHz
R
L
=3Ω
R
L
=4Ω
R
L
=3Ω
R
L
=4Ω
R
L
=8Ω
R
L
=8Ω
Output Power
(measured at the device
terminals)
THD=1%, f=1kHz
SOP/DIP
THD+N=10%, f=1kHz
THD+N=1%, f=1kHz, RL=32Ω
20Hz≤f≤20kHz,
Total Harmonic
HTSSOP-20
R
L
=4Ω, P
OUT
=2W
THD+N
A
VD
=2
Distortion + Noise
SOP/DIP
R
L
=8Ω, P
OUT
=1W
V
DD
=5V, V
RIPPLE
=200mV
RMS
, R
L
=8Ω,
Power Supply Rejection Ratio
PSRR
C
B
=1.0µF
Channel Separation
X
TALK
f=1kHz, C
B
=1.0µF
Signal To Noise Ratio
SNR V
DD
=5V, P
OUT
=1.1W, R
L
=8Ω
1.0
W
W
%
dB
dB
dB
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QW-R107-027.D
LM4863
ELECTRICAL CHARACTERISTICS(Cont.)
PARAMETER
FOR SINGLE-ENDED OPERATION
Output Offset Voltage
SYMBOL
V
O(OFF)
TEST CONDITIONS
CMOS IC
MIM TYP MAX UNIT
V
IN
=0V
5
50
mV
THD=0.5%, f=1kHz, R
L
=32Ω
75
85
Output Power
P
OUT
THD+N=1%, f=1kHz, R
L
=8Ω
mW
340
THD+N=10%, f=1kHz, R
L
=8Ω
440
A
V
=-1, P
OUT
=75mW,20Hz≤f≤20kHz,
Total Harmonic Distortion + Noise
THD+N
0.2
%
R
L
=32Ω
Power Supply Rejection Ratio
PSRR C
B
=1.0µF, V
RIPPLE
=200mV
RMS,
f=1kHz
52
dB
Channel Separation
X
TALK
f=1kHz, C
B
=1.0µF
60
dB
Signal To Noise Ratio
SNR V
DD
=5V, P
OUT
=340mW, R
L
=8Ω
95
dB
Note:1
. All voltages are measured with respect to the ground (GND) pins, unless otherwise specified.
2. Depends on the offset voltage when a practical load is connected to the amplifier.
3. When driving 3Ω or 4Ω and operating on a 5V supply, the HTSSOP-20 package must be mounted to the
circuit board that has a minimum of 2.5 in
2
of exposed, uninterrupted copper area connected to the
exposed-DAP.
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QW-R107-027.D
LM4863
TYPICAL APPLICATION CIRCUIT
V
DD
C
I
R
F
1µF 20KΩ
+
6
4,13
- IN A
+IN A
Bypass
C
S
0.1µF
TANT
-
AMP 1A
+
20KΩ
-OUT A 5
20KΩ
20KΩ
-
AMP 2A
+
+OUT A
-
AMP 1B
+
20KΩ
CMOS IC
Audio
Input
R
I
8
20KΩ
C
B
10
50KΩ
V
DD
/2
50KΩ
CONTROL PIN
R
L
1kΩ
RING
8Ω
3 To HP-IN Circuit
C
O
100µF
+
R
L
8Ω
SLEEVE
TIP
HEADPHONE JACK
1kΩ
C
O
100µF
+
20KΩ
V
DD
R
F
20KΩ
100kΩ
1
Shutdown
To Control Pin on
16
HP-IN
Headphone jack
100KΩ
GND 2,7,15
Audio
Input
C
I
(CB size)
0.33µF
1µF
R
I
11 -IN B
9 +IN B
-OUT B 12
20KΩ
20KΩ
14
-
AMP 2B
+
+OUT B
Note: Pin out shown for DIP-16. Refer to the PIN CONFIGURATION for the pin out of other packages.
Figure 1.Typical Audio Amplifier Application Circuit
EXTERNAL COMPONENTS DESCRIPTION
Components
R
I
C
I
R
F
C
S
C
B
Functional Description
The inverting input resistance, along with R
F
, set the closed-loop gain. R
I
, along with C
I
form a high
pass filter with fc=1/(2πR
I
C
I
)
The input coupling capacitor blocks DC voltage at the amplifier’s input terminals. C
I
, along with R
I
,
create a high pass filter with fc=1/(2πR
I
C
I
). Refer to the section. Selecting Proper External
Components, for an explanation of determine the value of C
I
.
The feedback resistance, along with R
I
, set the closed-Ioop gain.
The supply bypass capacitor. Refer to the Power Supply Bypassing section for information about
properly placing and selecting the value of, this capacitor.
The capacitor, C
B
, filters the half-supply voltage present on the Bypass pin. Refer to the Selecting
Proper External Components section for information concerning proper placement and selecting
C
B
’S value.
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