Field Programmable Gate Array, 400 CLBs, 19200 Gates, 51MHz, CMOS, PQCC84
Parameter Name | Attribute value |
Maker | LSC/CSI |
package instruction | , |
Reach Compliance Code | unknown |
Other features | MAXIMUM USABLE GATES 44200 |
maximum clock frequency | 51 MHz |
Combined latency of CLB-Max | 4.1 ns |
JESD-30 code | S-PQCC-J84 |
Configurable number of logic blocks | 400 |
Equivalent number of gates | 19200 |
Number of terminals | 84 |
Maximum operating temperature | 70 °C |
Minimum operating temperature | |
organize | 400 CLBS, 19200 GATES |
Package body material | PLASTIC/EPOXY |
Package shape | SQUARE |
Package form | CHIP CARRIER |
Programmable logic type | FIELD PROGRAMMABLE GATE ARRAY |
Certification status | Not Qualified |
Maximum supply voltage | 5.25 V |
Minimum supply voltage | 4.75 V |
Nominal supply voltage | 5 V |
surface mount | YES |
technology | CMOS |
Temperature level | COMMERCIAL |
Terminal form | J BEND |
Terminal location | QUAD |