EEWORLDEEWORLDEEWORLD

Part Number

Search

CY62148VLL-70BAI

Description
512KX8 STANDARD SRAM, 70ns, PBGA36, 7 X 8.50 X 1.50 MM, FINE PITCH, TBGA-36
Categorystorage    storage   
File Size897KB,13 Pages
ManufacturerRochester Electronics
Websitehttps://www.rocelec.com/
Download Datasheet Parametric Compare View All

CY62148VLL-70BAI Overview

512KX8 STANDARD SRAM, 70ns, PBGA36, 7 X 8.50 X 1.50 MM, FINE PITCH, TBGA-36

CY62148VLL-70BAI Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerRochester Electronics
Parts packaging codeBGA
package instruction7 X 8.50 X 1.50 MM, FINE PITCH, TBGA-36
Contacts36
Reach Compliance Codeunknown
Maximum access time70 ns
Other featuresTTL COMPATIBLE INPUTS/OUTPUTS, LOW STANDBY POWER
JESD-30 codeR-PBGA-B36
JESD-609 codee0
length8.5 mm
memory density4194304 bit
Memory IC TypeSTANDARD SRAM
memory width8
Humidity sensitivity levelNOT SPECIFIED
Number of functions1
Number of terminals36
word count524288 words
character code512000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize512KX8
Package body materialPLASTIC/EPOXY
encapsulated codeTFBGA
Package shapeRECTANGULAR
Package formGRID ARRAY, THIN PROFILE, FINE PITCH
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusCOMMERCIAL
Filter levelMIL-STD-883
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN LEAD
Terminal formBALL
Terminal pitch0.75 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
width7 mm

CY62148VLL-70BAI Preview

D ts e t
aa h e
R c e t r lc r nc
o h se Ee to is
Ma u a t r dCo o e t
n fc u e
mp n n s
R c e tr b a d d c mp n ns ae
o h se rn e
o oet r
ma ua trd u ig ete dewaes
n fcue sn i r i/ fr
h
p rh s d f m te oiia s p l r
uc a e r
o h r n l u pi s
g
e
o R c e tr waes rce td f m
r o h se
fr e rae r
o
te oiia I. Al rce t n ae
h
r nl P
g
l e rai s r
o
d n wi tea p o a o teOC
o e t h p rv l f h
h
M.
P r aetse u igoiia fcoy
at r e td sn r n la tr
s
g
ts p o rmso R c e tr e eo e
e t rga
r o h se d v lp d
ts s lt n t g aa te p o u t
e t oui s o u rne
o
rd c
me t o e c e teOC d t s e t
es r x e d h
M aa h e.
Qu l yOv riw
ai
t
e ve
• IO- 0 1
S 90
•A 92 cr ct n
S 1 0 et ai
i
o
• Qu l e Ma ua trr Ls (
ai d
n fcues it QML MI- R -
) LP F
385
53
•C a sQ Mitr
ls
lay
i
•C a sVS a eL v l
ls
p c ee
• Qu l e S p l r Ls o D sr uos( L )
ai d u pi s it f it b tr QS D
e
i
•R c e trsacic l u pir oD A a d
o h se i
r ia s p l t L n
t
e
me t aln u t a dD A sa d r s
es lid sr n L tn ad .
y
R c e tr lcrnc , L i c mmi e t
o h se Ee t is L C s o
o
tdo
t
s p ligp o u t ta s t f c so r x e t-
u pyn rd cs h t ai y u tme e p ca
s
t n fr u lya daee u loto eoiial
i s o q ai n r q a t h s r n l
o
t
g
y
s p l db id sr ma ua trr.
u pi
e yn ut
y n fcues
T eoiia ma ua trr d ts e t c o a yn ti d c me t e e t tep r r n e
h r n l n fcue’ aa h e a c mp n ig hs o u n r cs h ef ma c
g
s
o
a ds e ic t n o teR c e tr n fcue v rino ti d vc . o h se Ee t n
n p c ai s f h o h se ma ua trd eso f hs e ie R c e tr lcr -
o
o
isg aa te tep r r n eo i s mio d co p o u t t teoiia OE s e ic -
c u rne s h ef ma c ft e c n u tr rd cs o h r n l M p c a
o
s
g
t n .T pc lv le aefr eee c p r o e o l. eti mii m o ma i m rt g
i s ‘y ia’ au s r o rfrn e up s s ny C r n nmu
o
a
r xmu ai s
n
ma b b s do p o u t h rceiain d sg , i lt n o s mpetsig
y e a e n rd c c aa tr t , e in smuai , r a l e t .
z o
o
n
© 2 1 R cetr l t n s LC Al i t R sre 0 1 2 1
0 3 ohs E cr i , L . lRg s eevd 7 1 0 3
e e oc
h
T l r m r, l s v iw wrcl . m
o e n oe p ae it w . e c o
a
e
s
o ec
48V
MoBL
CY62148V MoBL™
512K x 8 MoBL Static RAM
Features
• Low voltage range:
— 2.7V–3.6V
• Ultra low active power
• Low standby power
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
• CMOS for optimum speed/power
The device can be put into standby mode when deselected
(CE HIGH).
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O
pins (I/O
0
through I/O
7
) is then written into the location speci-
fied on the address pins (A
0
through A
18
).
Reading from the device is accomplished by taking Chip En-
able (CE) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH. Under these conditions, the contents of
the memory location specified by the address pins will appear
on the I/O pins.
The eight input/output pins (I/O
0
through I/O
7
) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW and WE LOW).
The CY62148V is available in a 36-ball FBGA, 32 pin TSOPII,
and a 32-pin SOIC package.
Functional Description
The CY62148V is a high-performance CMOS static RAM or-
ganized as 524,288 words by 8 bits. This device features ad-
vanced circuit design to provide ultra-low active current. This
is ideal for providing More Battery Life™ (MoBL™) in portable
applications such as cellular telephones. The device also has
an automatic power-down feature that significantly reduces
power consumption by 99% when addresses are not toggling.
Logic Block Diagram
Data in Drivers
I/O
0
I/O
1
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
ROW DECODER
SENSE AMPS
I/O
2
I/O
3
I/O
4
I/O
5
512K x 8
ARRAY
CE
WE
COLUMN
DECODER
POWER
DOWN
I/O
6
I/O
7
A
10
A
11
A
12
A
13
A
14
A
15
A
16
A
17
A
18
OE
62148V-1
Cypress Semiconductor Corporation
Document #: 38-05070 Rev. **
3901 North First Street
San Jose
CA 95134 • 408-943-2600
Revised September 4, 2001
CY62148V MoBL™
Pin Configurations
TSOPII/SOIC
Top View
A
17
A
16
A
14
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
I/O
0
I/O
1
I/O
2
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
FBGA
Top View
1
V
CC
A
15
A
18
WE
A
13
A
8
A
9
A
11
OE
A
10
CE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
A
0
I/O
4
I/O
5
V
SS
V
CC
I/O
6
I/O
7
A
9
OE
A
10
A
18
CE
A
11
A
17
A
16
A
12
A
15
A
13
2
A
1
A
2
3
NC
WE
NC
4
A
3
A
4
A
5
5
A
6
A
7
6
A
8
I/O
0
I/O
1
V
CC
V
SS
I/O
2
I/O
3
A
14
A
B
C
D
E
F
G
H
62148V–2
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature ................................. –65°C to +150°C
Ambient Temperature with
Power Applied............................................... 55°C to +125°C
Supply Voltage to Ground Potential ............... –0.5V to +4.6V
DC Voltage Applied to Outputs
in High Z State
[1]
....................................–0.5V to V
CC
+ 0.5V
DC Input Voltage
[1]
................................ –0.5V to V
CC
+ 0.5V
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage .......................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current.................................................... >200 mA
Operating Range
Range
Industrial
Ambient Temperature
–40°C to +85°C
V
CC
2.7V to 3.6V
Product Portfolio
Power Dissipation (Industrial)
Product
Min.
CY62148V
2.7V
V
CC
Range
Typ.
[2]
3.0V
Max.
3.6V
Speed
70 ns
Operating (I
CC
)
Typ.
[2]
7
Maximum
15 mA
Ty.p
[2]
2
µA
Standby (I
SB2
)
Maximum
20
µA
Notes:
1. V
IL(min.)
= –2.0V for pulse durations less than 20 ns.
2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ.)
, T
A
= 25°C.
Document #: 38-05070 Rev. **
Page 2 of 12
CY62148V MoBL™
Electrical Characteristics
Over the Operating Range
CY62148V
Parameter
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
CC
Description
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Load Current
Output Leakage Current
V
CC
Operating Supply
Current
GND < V
I
< V
CC
GND < V
O
< V
CC
, Output
Disabled
I
OUT
= 0 mA, (f =
f
MAX
= 1/t
RC
) CMOS
Levels
V
CC
= 3.6V
Test Conditions
I
OH
= –1.0 mA
I
OL
= 2.1 mA
Min.
2.4
0.4
2.2
–0.5
–1
–1
+1
+1
7
V
CC
+ 0.5V
0.8
+1
+1
15
Typ.
[2]
Max.
Unit
V
V
V
V
µA
µA
mA
V
CC
= 2.7V
V
CC
= 2.7V
V
CC
= 3.6V
V
CC
= 2.7V
I
OUT
= 0 mA, f = 1 MHz CMOS Levels
I
SB1
Automatic CE
Power-Down Current—
CMOS Inputs
Automatic CE
Power-Down Current—
CMOS Inputs
CE > V
CC
0.3V,
V
IN
> V
CC
0.3V or
V
IN
< 0.3V, f = f
MAX
CE > V
CC
0.3V
V
IN
> V
CC
0.3V
or V
IN
< 0.3V, f = 0
L
V
CC
=
3.6V
LL
1
2
100
mA
µA
I
SB2
1
2
50
20
µA
µA
Capacitance
[3]
Parameter
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Test Conditions
T
A
= 25°C, f = 1 MHz,
V
CC
= 3.0V
Max.
6
8
Unit
pF
pF
Thermal Resistance
Description
Thermal Resistance
(Junction to Ambient)
[3]
Test Conditions
Still Air, soldered on a 4.25 x 1.125 inch, 4-lay-
er printed circuit board
Symbol
Θ
JA
Θ
JC
Others
TBD
TBD
BGA
TBD
TBD
Units
°C/W
°C/W
Thermal Resistance
[3]
(Junction to Case)
Note:
3. Tested initially and after any design or process changes that may affect these parameters.
Document #: 38-05070 Rev. **
Page 3 of 12
CY62148V MoBL™
AC Test Loads and Waveforms
R1
V
CC
OUTPUT
30 pF
INCLUDING
JIG AND
SCOPE
R2
V
CC
Typ
10%
GND
Rise Time: 1 V/ns
ALL INPUT PULSES
90%
90%
10%
Fall time: 1 V/ns
62148V–3
62148V–4
Equivalent to:
THÉVENIN EQUIVALENT
R
TH
V
TH
OUTPUT
Parameters
R1
R2
R
TH
V
TH
3.0V
1105
1550
645
1.75V
Unit
Ohms
Ohms
Ohms
Volts
Data Retention Characteristics
(Over the Operating Range)
Parameter
V
DR
I
CCDR
Description
V
CC
for Data Retention
Data Retention Current
V
CC
= 1.0V
L/ LL
CE > V
CC
0.3V,
V
IN
> V
CC
0.3V or
V
IN
< 0.3V
No input may exceed
V
CC
+0.3V
0
t
RC
Conditions
Min.
1.0
0.2
Typ.
[2]
Max.
3.6
5.5
Unit
V
µA
µA
t
CDR[3]
t
R[4]
Chip Deselect to Data
Retention Time
Operation Recovery
Time
ns
ns
Note:
4. Full Device AC operation requires linear V
CC
ramp from V
DR
to V
CC(min.)
> 10
µ
s or stable at V
CC(min.)
>
10
µ
s.
Data Retention Waveform
DATA RETENTION MODE
V
CC
1.0V
t
CDR
CE
62148V–5
V
DR
> 1.0 V
1.0V
t
R
Document #: 38-05070 Rev. **
Page 4 of 12

CY62148VLL-70BAI Related Products

CY62148VLL-70BAI CY62148VLL-70BAIT CY62148VLL-70SI
Description 512KX8 STANDARD SRAM, 70ns, PBGA36, 7 X 8.50 X 1.50 MM, FINE PITCH, TBGA-36 512KX8 STANDARD SRAM, 70ns, PBGA36, 7 X 8.50 X 1.50 MM, FINE PITCH, TBGA-36 512KX8 STANDARD SRAM, 70ns, PDSO32, 0.450 INCH, PLASTIC, SOIC-32
Maker Rochester Electronics Rochester Electronics Rochester Electronics
Parts packaging code BGA BGA SOIC
package instruction 7 X 8.50 X 1.50 MM, FINE PITCH, TBGA-36 TFBGA, SOP,
Contacts 36 36 32
Reach Compliance Code unknown unknown unknown
Maximum access time 70 ns 70 ns 70 ns
Other features TTL COMPATIBLE INPUTS/OUTPUTS, LOW STANDBY POWER TTL COMPATIBLE INPUTS/OUTPUTS, LOW STANDBY POWER TTL COMPATIBLE INPUTS/OUTPUTS, LOW STANDBY POWER
JESD-30 code R-PBGA-B36 R-PBGA-B36 R-PDSO-G32
length 8.5 mm 8.5 mm 20.447 mm
memory density 4194304 bit 4194304 bit 4194304 bit
Memory IC Type STANDARD SRAM STANDARD SRAM STANDARD SRAM
memory width 8 8 8
Number of functions 1 1 1
Number of terminals 36 36 32
word count 524288 words 524288 words 524288 words
character code 512000 512000 512000
Operating mode ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS
Maximum operating temperature 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C
organize 512KX8 512KX8 512KX8
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TFBGA TFBGA SOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR
Package form GRID ARRAY, THIN PROFILE, FINE PITCH GRID ARRAY, THIN PROFILE, FINE PITCH SMALL OUTLINE
Parallel/Serial PARALLEL PARALLEL PARALLEL
Certification status COMMERCIAL COMMERCIAL COMMERCIAL
Filter level MIL-STD-883 MIL-STD-883 MIL-STD-883
Maximum seat height 1.2 mm 1.2 mm 2.9972 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 2.7 V 2.7 V 2.7 V
Nominal supply voltage (Vsup) 3 V 3 V 3 V
surface mount YES YES YES
technology CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal form BALL BALL GULL WING
Terminal pitch 0.75 mm 0.75 mm 1.27 mm
Terminal location BOTTOM BOTTOM DUAL
width 7 mm 7 mm 11.303 mm
Is it lead-free? Contains lead - Contains lead
Is it Rohs certified? incompatible - incompatible
JESD-609 code e0 - e0
Peak Reflow Temperature (Celsius) NOT SPECIFIED - NOT SPECIFIED
Terminal surface TIN LEAD - TIN LEAD
Maximum time at peak reflow temperature NOT SPECIFIED - NOT SPECIFIED

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号