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UT54ACS20-UCC

Description
NAND Gate, AC Series, 2-Func, 4-Input, CMOS, CDFP14, FP-14
Categorylogic    logic   
File Size25KB,4 Pages
ManufacturerCobham Semiconductor Solutions
Download Datasheet Parametric View All

UT54ACS20-UCC Overview

NAND Gate, AC Series, 2-Func, 4-Input, CMOS, CDFP14, FP-14

UT54ACS20-UCC Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerCobham Semiconductor Solutions
Parts packaging codeDFP
package instructionDFP,
Contacts14
Reach Compliance Codeunknown
seriesAC
JESD-30 codeR-CDFP-F14
JESD-609 codee0
length9.525 mm
Logic integrated circuit typeNAND GATE
Number of functions2
Number of entries4
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDFP
Package shapeRECTANGULAR
Package formFLATPACK
Peak Reflow Temperature (Celsius)NOT SPECIFIED
propagation delay (tpd)15 ns
Certification statusNot Qualified
Maximum seat height2.921 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formFLAT
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width6.2865 mm
UT54ACS20/UT54ACTS20
Radiation-Hardened
Dual 4-Input NAND Gates
FEATURES
PINOUTS
14-Pin DIP
Top View
A1
B1
NC
C1
D1
Y1
V
SS
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
D2
C2
NC
B2
A2
Y2
radiation-hardened CMOS
- Latchup immune
High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
- 14-pin DIP
- 14-lead flatpack
DESCRIPTION
The UT54ACS20 and the UT54ACTS20 are dual 4-input
NAND gates. The circuits perform the Boolean functions
Y = A B C D or Y = A + B + C + D in positive logic.
The devices are characterized over full military temperature
range of -55 C to +125 C.
FUNCTION TABLE
INPUTS
A
H
L
X
X
X
B
H
X
L
X
X
C
H
X
X
L
X
D
H
X
X
X
L
OUTPUT
Y
L
H
H
H
H
A1
B1
C1
D1
&
(6)
Y1
A2
B2
C2
D2
Y1
A1
B1
NC
C1
D1
Y1
V
SS
14-Lead Flatpack
Top View
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
D2
C2
NC
B2
A2
Y2
LOGIC DIAGRAM
LOGIC SYMBOL
A1
B1
C1
D1
A2
B2
C2
D2
(1)
(2)
(4)
(5)
(9)
(10)
(12)
(13)
(8)
Y2
Y2
Note:
1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and IEC
Publication 617-12.
29
RadHard MSI Logic
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