S E M I C O N D U C T O R
REGISTRATION PENDING
Currently Available as FRS430 (D, R, H)
November 1994
2N7282D, 2N7282R
2N7282H
Radiation Hardened
N-Channel Power MOSFETs
Package
TO-257AA
Features
• 3A, 500V, RDS(on) = 2.52Ω
• Second Generation Rad Hard MOSFET Results From New Design Concepts
• Gamma
-
-
-
-
-
-
-
-
-
Meets Pre-Rad Specifications to 100KRAD(Si)
Defined End Point Specs at 300KRAD(Si) and 1000KRAD(Si)
Performance Permits Limited Use to 3000KRAD(Si)
Survives 3E9RAD(Si)/sec at 80% BVDSS Typically
Survives 2E12 Typically If Current Limited to IDM
8.0nA Per-RAD(Si)/sec Typically
Pre-RAD Specifications for 3E12 Neutrons/cm
2
Usable to 3E13 Neutrons/cm
2
Typically Survives 1E5ions/cm
2
Having an
LET
≤
35MeV/mg/cm
2
and a Range
≥
30µm at 80% BVDSS
• Gamma Dot
• Photo Current
• Neutron
• Single Event
Description
The Harris Semiconductor Sector has designed a series of SECOND GENERA-
TION hardened power MOSFETs of both N and P channel enhancement types
with ratings from 100V to 500V, 1A to 60A, and on resistance as low as 25mΩ.
Total dose hardness is offered at 100K RAD(Si) and 1000KRAD(Si) with neutron
hardness ranging from 1E13n/cm
2
for 500V product to 1E14n/cm
2
for 100V prod-
uct. Dose rate hardness (GAMMA DOT) exists for rates to 1E9 without current lim-
iting and 2E12 with current limiting. Heavy ion survival from signal event drain
burn-out exists for linear energy transfer (LET) of 35 at 80% of rated voltage.
This MOSFET is an enhancement-mode silicon-gate power field effect transistor of
the vertical DMOS (VDMOS) structure. It is specially designed and processed to
exhibit minimal characteristic changes to total dose (GAMMA) and neutron (n
o
)
exposures. Design and processing efforts are also directed to enhance survival to
heavy ion (SEE) and/or dose rate (GAMMA DOT) exposure.
This part may be supplied as a die or in various packages other than shown above.
Reliability screening is available as either non TX (commercial), TX equivalent of
MIL-S-19500, TXV equivalent of MIL-S-19500, or space equivalent of MIL-S-
19500. Contact the Harris Semiconductor High-Reliability Marketing group for any
desired deviations from the data sheet.
Symbol
Absolute Maximum Ratings
(TC = +25
o
C) Unless Otherwise Specified
2N7282D, R, H
500
500
3
2
9
±20
50
20
0.40
9
3
9
-55 to +150
300
UNITS
V
V
A
A
A
V
W
W
W/
o
C
A
A
A
o
C
o
C
Drain-Source Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS
Drain-Gate Voltage (RGS = 20kΩ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Continuous Drain Current
TC = +25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID
TC = +100
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS
Maximum Power Dissipation
TC = +25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT
TC = +100
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT
Derated Above +25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Inductive Current, Clamped, L = 100µH, (See Test Figure). . . . . . . . . . . . . . . . . . . . . . . . . . ILM
Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IS
Pulsed Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISM
Operating And Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJC, TSTG
Lead Temperature (During Soldering)
Distance > 0.063 in. (1.6mm) From Case, 10s Max. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures.
Copyright
©
Harris Corporation 1993
File Number
3253.1
1
Specifications 2N7282D, 2N7282R, 2N7282H - Registration Pending
Pre-Radiation Electrical Specifications
TC = +25
o
C, Unless Otherwise Specified
LIMITS
PARAMETER
Drain-Source Breakdown Volts
Gate-Threshold Volts
Gate-Body Leakage Forward
Gate-Body Leakage Reverse
Zero-Gate Voltage
Drain Current
SYMBOL
BVDSS
VGS(th)
IGSSF
IGSSR
IDSS1
IDSS2
IDSS3
IAR
VDS(on)
RDS(on)
td(on)
tr
td(off)
tf
QG(th)
QG(on)
QGM
VGP
QGS
QGD
VSD
TT
Rθjc
Rθja
Free Air Operation
ID = 3A, VGD = 0
I = 3A; di/dt = 100A/µs
VDD = 250V, ID = 3A
IGS1 = IGS2
0
≤
VGS
≤
20
TEST CONDITIONS
VGS = 0, ID = 1mA
VDS = VGS, ID = 1mA
VGS = +20V
VGS = -20V
VDS = 500V, VGS = 0
VDS = 400V, VGS = 0
VDS = 400V, VGS = 0, TC = +125
o
C
Time = 20µs
VGS = 10V, ID = 3A
VGS = 10V, ID = 2A
VDD = 250V, ID = 3A
Pulse Width = 3µs
Period = 300µs, Rg = 25Ω
0
≤
VGS
≤
10 (See Test Circuit)
MIN
500
2.0
-
-
-
-
-
-
-
-
-
-
-
-
0.5
17
32
3
2
10
0.6
-
-
-
MAX
-
4.0
100
100
1
0.025
0.25
9
7.94
2.52
34
60
ns
Turn-Off Delay Time
Fall Time
Gate-Charge Threshold
Gate-Charge On State
Gate-Charge Total
Plateau Voltage
Gate-Charge Source
Gate-Charge Drain
Diode Forward Voltage
Reverse Recovery Time
Junction-To-Case
Junction-To-Ambient
224
60
3
68
128
12
8
nc
40
1.8
TBD
2.5
o
C/W
UNITS
V
V
nA
nA
mA
Rated Avalanche Current
Drain-Source On-State Volts
Drain-Source On Resistance
Turn-On Delay Time
Rise Time
A
V
Ω
nc
V
V
ns
60
VDD
RL
V1
E1 = 0.5 BVDSS
VC = 0.75 BVDSS
L
VDS
DUT
E1
VC
0.06Ω
IL
Rg
FIGURE 1. SWITCHING TIME TESTING
FIGURE 2. CLAMPED INDUCTIVE SWITCHING
2
Specifications 2N7282D, 2N7282R, 2N7282H - Registration Pending
Post-Radiation Electrical Specifications
TC = +25
o
C, Unless Otherwise Specified
LIMITS
PARAMETER
Drain-Source
Breakdown Volts
(Note 4, 6)
(Note 5, 6)
Gate-Source
Threshold Volts
(Note 4, 6)
(Note 3, 5, 6)
Gate-Body
Leakage Forward
(Note 4, 6)
(Note 5, 6)
Gate-Body
Leakage Reverse
(Note 2, 4, 6)
(Note 2, 5, 6)
Zero-Gate Voltage
Drain Current
(Note 4, 6)
(Note 5, 6)
Drain-Source
On-State Volts
(Note 1, 4, 6)
(Note 1, 5, 6)
Drain-Source
On Resistance
(Note 1, 4, 6)
(Note 1, 5, 6)
NOTES:
1. Pulse test, 300µs max
2. Absolute value
3. Gamma = 300KRAD(Si)
4. Gamma = 10KRAD(Si) for “D”, 100KRAD(Si) for “R”. Neutron = 3E12
5. Gamma = 1000KRAD(Si). Neutron = 3E12
6. Insitu Gamma bias must be sampled for both VGS = +10V, VDS = 0V and VGS = 0V, VDS = 80% BVDSS
7. Gamma data taken 10/29/90 on TA 17635 devices by GE ASTRO SPACE; EMC/SURVIVABILITY LABORATORY; KING OF PRUSSIA,
PA 19401
8. Single event drain burnout testing by Titus, J.L., et al of NWSC, Crane, IN at Brookhaven Nat. Lab. Dec 11-14, 1989
9. Neutron derivation, HARRIS Application note AN-8831, Oct. 1988
SYMBOL
BVDSS
BVDSS
VGS(th)
VGS(th)
IGSSF
IGSSF
IGSSR
IGSSR
IDSS
IDSS
VDS(on)
VDS(on)
RDS(on)
RDS(on)
TYPE
2N7282D, R
2N7282H
2N7282D, R
2N7282H
2N7282D, R
2N7282H
2N7282D, R
2N7282H
2N7282D, R
2N7282H
2N7282D, R
2N7282H
2N7282D, R
2N7282H
TEST CONDITIONS
VGS = 0, ID = 1mA
VGS = 0, ID = 1mA
VGS = VDS, ID = 1mA
VGS = VDS, ID = 1mA
VGS = 20V, VDS = 0
VGS = 20V, VDS = 0
VGS = -20V, VDS = 0
VGS = -20V, VDS = 0
VGS = 0, VDS = 400V
VGS = 0, VDS = 400V
VGS = 10V, ID = 3A
VGS = 16V, ID = 3A
VGS = 10V, ID = 2A
VGS = 14V, ID = 2A
MIN
500
475
2.0
1.5
-
-
-
-
-
-
-
-
-
-
MAX
-
-
4.0
4.5
100
200
100
200
25
100
7.94
11.91
2.52
3.78
UNITS
V
V
V
V
nA
nA
nA
nA
µA
µA
V
V
Ω
Ω
3
2N7282D, 2N7282R, 2N7282H - Registration Pending
Packaging
A
E
Q
H
1
ØP
A
1
TO-257AA
3 LEAD JEDEC TO-257AA HERMETIC METAL PACKAGE
INCHES
SYMBOL
A
A
1
Øb
Øb
1
D
E
e
MIN
0.190
0.035
0.025
0.060
0.645
0.410
MAX
0.200
0.045
0.035
0.090
0.665
0.420
MILLIMETERS
MIN
4.83
0.89
0.64
1.53
16.39
10.42
MAX
5.08
1.14
0.88
2.28
16.89
10.66
NOTES
-
-
2, 3
-
-
-
4
4
-
4
-
-
-
-
D
0.100 TYP
0.200 BSC
0.230
0.110
0.600
-
0.140
0.113
0.250
0.130
0.650
0.035
0.150
0.133
2.54 TYP
5.08 BSC
5.85
2.80
15.24
-
3.56
2.88
6.35
3.30
16.51
0.88
3.81
3.37
L
1
L
0.065 R TYP.
Øb
1
e
1
H
1
J
1
L
L
1
ØP
b
1
2
3
J
1
e
e
1
Q
NOTES:
1. These dimensions are within allowable dimensions of Rev. B of
JEDEC TO-257AA dated 9-88.
2. Add typically 0.002 inches (0.05mm) for solder coating.
3. Lead dimension (without solder).
4. Position of lead to be measured 0.150 inches (3.81mm) from bottom
of dimension D.
5. Die to base BeO isolated, terminals to case ceramic isolated.
6. Controlling dimension: Inch.
7. Revision 1 dated 1-93.
5