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X28VC256DM-70

Description
EEPROM, 32KX8, 70ns, Parallel, CMOS, CDIP28, HERMETIC SEALED, CERDIP-28
Categorystorage    storage   
File Size107KB,24 Pages
ManufacturerXicor Inc.
Download Datasheet Parametric View All

X28VC256DM-70 Overview

EEPROM, 32KX8, 70ns, Parallel, CMOS, CDIP28, HERMETIC SEALED, CERDIP-28

X28VC256DM-70 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerXicor Inc.
package instructionHERMETIC SEALED, CERDIP-28
Reach Compliance Codeunknown
Maximum access time70 ns
Other featuresPAGE WRITE
command user interfaceNO
Data pollingYES
Durability100000 Write/Erase Cycles
JESD-30 codeR-GDIP-T28
JESD-609 codee0
length37.15 mm
memory density262144 bit
Memory IC TypeEEPROM
memory width8
Number of functions1
Number of terminals28
word count32768 words
character code32000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize32KX8
Output characteristics3-STATE
Package body materialCERAMIC, GLASS-SEALED
encapsulated codeDIP
Encapsulate equivalent codeDIP28,.6
Package shapeRECTANGULAR
Package formIN-LINE
page size128 words
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Programming voltage5 V
Certification statusNot Qualified
Maximum seat height5.9 mm
Maximum standby current0.025 A
Maximum slew rate0.08 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
switch bitYES
width15.24 mm
X28VC256
256K
X28VC256
5 Volt, Byte Alterable E
2
PROM
DESCRIPTION
32K x 8 Bit
FEATURES
Access Time: 45ns
Simple Byte and Page Write
—Single 5V Supply
— No External High Voltages or V
PP
Control
Circuits
—Self-Timed
— No Erase Before Write
— No Complex Programming Algorithms
—No Overerase Problem
Low Power CMOS:
—Active: 80mA
—Standby: 10mA
Software Data Protection
—Protects Data Against System Level
Inadvertent Writes
High Speed Page Write Capability
Highly Reliable Direct Write
Cell
—Endurance: 100,000 Write Cycles
—Data Retention: 100 Years
Early End of Write Detection
—DATA Polling
—Toggle Bit Polling
The X28VC256 is a second generation high perfor-
mance CMOS 32K x 8 E
2
PROM. It is fabricated with
Xicor’s proprietary, textured poly floating gate tech-
nology, providing a highly reliable 5 Volt only nonvolatile
memory.
The X28VC256 supports a 128-byte page write opera-
tion, effectively providing a 24µs/byte write cycle and
enabling the entire memory to be typically rewritten in
less than 0.8 seconds. The X28VC256 also features
DATA
Polling and Toggle Bit Polling, two methods of
providing early end of write detection. The X28VC256
also supports the JEDEC standard Software Data Pro-
tection feature for protecting against inadvertent writes
during power-up and power-down.
Endurance for the X28VC256 is specified as a minimum
100,000 write cycles per byte and an inherent data
retention of 100 years.
PIN CONFIGURATION
PLASTIC DIP
CERDIP
FLAT PACK
SOIC
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
X28VC256
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
WE
A13
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/04
I/O3
LCC
PLCC
VCC
A12
A14
A13
WE
NC
A7
TSOP
4
A6
A5
A4
A3
A2
A1
A0
NC
I/O0
5
6
7
8
9
10
11
12
X28VC256
3
2
1 32 31 30
29
28
27
26
25
24
23
22
A8
A9
A11
NC
OE
A10
CE
I/O7
I/O6
21
13
14 15 16 17 18 19 20
A2
A1
A0
I/O0
I/O1
I/O2
NC
VSS
NC
I/O3
I/O4
I/O5
I/O6
I/O7
CE
A10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
X28VC256
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A3
A4
A5
A6
A7
A12
A14
NC
VCC
NC
WE
A13
A8
A9
A11
OE
I/O1
I/O2
VSS
NC
I/O3
I/O4
I/O5
3869 FHD F02
3869 FHD F03
3869 ILL F22
©Xicor, Inc. 1991, 1995 Patents Pending
3869-2.6 4/2/96 T4/C4/D0 NS
1
Characteristics subject to change without notice
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