The Q24S15050 surface mounted DC-DC converter offers unprecedented
performance in the industry-standard quarter brick format. This is
accomplished through the use of patent pending circuit and packaging
techniques to achieve ultra-high efficiency, excellent thermal performance and
a very low body profile.
In telecommunications applications the Q Family 15 A converters provide
thermal performance comparable with existing 20 A designs. Low body profile
and the preclusion of heat sinks minimize airflow shadowing, thus enhancing
cooling for downstream devices. The use of 100% surface-mount
technologies for assembly, coupled with Bel Power Solutions advanced
electric and thermal circuitry and packaging, results in a product with
extremely high quality and reliability. RoHS lead-free solder and lead-solder-
exempted products are available.
Delivers up to 15 A
High efficiency: 88.5% @ 15 A, 88.5% @ 7.5 A
Start-up into pre-biased output
No minimum load required
No heat sink required
Low profile: 0.26” [6.6 mm]
Low weight: 1 oz [28 g] typical
Industry-standard footprint: 1.45” x 2.30”
On-board LC input filter
Fixed-frequency operation
Fully protected
Remote output sense
Output voltage trim range: +10%/-20%
Trim resistor via industry-standard equations
High reliability: MTBF 2.6 million hours, calculated per Telcordia TR-332,
Method I Case 1
Positive or negative logic ON/OFF option
Approved to the latest edition of the following standards: UL/CSA60950-1,
IEC60950-1 and EN60950-1.
Meets conducted emissions requirements of FCC Class B and EN55022 Class B
with external filter
All materials meet UL94, V-0 flammability rating
Telecommunications
Data communications
Wireless
Servers
2
Q24S15050
Conditions: T
A
= 25ºC, Airflow = 300 LFM (1.5 m/s), Vin = 24 VDC, unless otherwise specified.
PARAMETER
Absolute Maximum Ratings
Input Voltage
Operating Ambient Temperature
Storage Temperature
CONDITIONS / DESCRIPTION
MIN
TYP
MAX
UNITS
Continuous
0
-40
-55
40
85
125
Vdc
°C
°C
Input Characteristics
Operating Input Voltage Range
Input Under Voltage Lockout
Turn-on Threshold
Turn-off Threshold
Non-latching
16
15
17
16
17.5
16.5
Vdc
Vdc
18
24
36
Vdc
Output Characteristics
External Load Capacitance
Output Current Range
Current Limit Inception
Peak Short-Circuit Current
RMS Short-Circuit Current
Non-latching
Non-latching. Short=10mΩ.
Non-latching
Plus full load (resistive)
0
16.5
18
30
10,000
15
20
40
5.3
μF
Adc
Adc
A
Arms
Isolation Characteristics
I/O Isolation
Isolation Capacitance
Isolation Resistance
10
2000
230
Vdc
ρF
MΩ
Feature Characteristics
Switching Frequency
Output Voltage Trim Range
1
Remote Sense Compensation
1
Output Over-Voltage Protection
Over-Temperature Shutdown (PCB)
Auto-Restart Period
Turn-On Time
ON/OFF Control (Positive Logic)
Converter Off
Converter On
ON/OFF Control (Negative Logic)
Converter Off
Converter On
2.4
-20
20
0.8
Vdc
Vdc
-20
2.4
0.8
20
Vdc
Vdc
Use trim equations on Page 6
Percent of V
OUT
(
NOM
)
Non-latching
Non-latching
Applies to all protection features
117
122
118
100
2.5
-20
435
+10
+10
127
kHz
%
%
%
°C
ms
ms
Input Characteristics
Maximum Input Current
Input Stand-by Current
15 Adc, 5.0 Vdc Out @ 18 Vdc In
Vin = 24 V, converter disabled
2.5
4.7
Adc
mAdc
tech.support@psbel.com
Q24S15050
Input No Load Current (0 load on the output)
Input Reflected-Ripple Current
Input Voltage Ripple Rejection
Vin = 24 V, converter enabled
See Figure 25 - 25MHz bandwidth
120Hz
130
6
TBD
mAdc
3
mAPK-PK
dB
Output Characteristics
Output Voltage Set Point (no load)
Output Regulation
Over Line
Over Load
Output Voltage Range
Output Ripple and Noise - 25MHz bandwidth
Over line, load and temperature
Full load + 10
μF
tantalum + 1
μF
ceramic
4.925
30
±2
±2
±5
±5
5.075
50
mV
mV
Vdc
mVPK-PK
-40ºC to 85ºC
4.950
5.000
5.050
Vdc
Dynamic Response
Load Change 25% of Iout Max, di/dt = 0.1 A/μS Co = 1
μF
ceramic (Fig.20)
di/dt = 5 A/μS
Setting Time to 1%
Co = 450
μF
tant. + 1
μF
ceramic (Fig.21)
100
100
150
mV
mV
µs
Efficiency
100% Load
50% Load
1)
88.5
88.5
%
%
Vout can be increased up to 10% via the sense leads or up to 10% via the trim function, however total output voltage trim
from all sources should not exceed 10% of VOUT(nom), in order to insure specified operation of over-voltage protection
circuitry. See further discussion at end of Output Voltage Adjust /TRIM section.
These power converters have been designed to be stable with no external capacitors when used in low inductance input
and output circuits.
However, in many applications, the inductance associated with the distribution from the power source to the input of the
converter can affect the stability of the converter. The addition of a 33 µF electrolytic capacitor with an ESR < 1
across
the input helps ensure stability of the converter. In many applications, the user has to use decoupling capacitance at the
load. The power converter will exhibit stable operation with external load capacitance up to 10,000 µF.
The ON/OFF pin is used to turn the power converter on or off remotely via a system signal. There are two remote control
options available, positive logic and negative logic and both are referenced to Vin(-). Typical connections are shown in Fig.1.
Vin (+)
Q
TM
Family
Vout (+)
SENSE (+)
TRIM
SENSE (-)
Rload
Converter
(Top View)
Vin
ON/OFF
Vin (-)
CONTROL
INPUT
Vout (-)
Figure 1. Circuit configuration for ON/OFF function.
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+86 755 298 85888
Europe, Middle East
+353 61 225 977
North America
+1 408 785 5200
BCD.00741_AB
© 2016 Bel Power Solutions & Protection
4
Q24S15050
The positive logic version turns on when the ON/OFF pin is at logic high and turns off when at logic low. The converter is on
when the ON/OFF pin is left open.
The negative logic version turns on when the pin is at logic low and turns off when the pin is at logic high. The ON/OFF pin
can be hard wired directly to Vin(-) to enable automatic power up of the converter without the need of an external control
signal.
ON/OFF pin is internally pulled-up to 5 V through a resistor. A mechanical switch, open collector transistor, or FET can be
used to drive the input of the ON/OFF pin. The device must be capable of sinking up to 0.2 mA at a low level voltage of
0.8 V. An external voltage source of ±20 V max. may be connected directly to the ON/OFF input, in which case it should be
capable of sourcing or sinking up to 1 mA depending on the signal polarity. See the Start-up Information section for system
timing waveforms associated with use of the ON/OFF pin.
The remote sense feature of the converter compensates for voltage drops occurring between the output pins of the converter
and the load. The SENSE(-) (Pin 5) and SENSE(+) (Pin 7) pins should be connected at the load or at the point where regulation
is required (see Fig. 2).
Vin (+)
Q
TM
Family
Vout (+)
100
Rw
Converter
(Top View)
SENSE (+)
TRIM
SENSE (-)
10
Rload
Vin
ON/OFF
Vin (-)
Vout (-)
Rw
Figure 2. Remote sense circuit configuration.
If remote sensing is not required, the SENSE(-) pin must be connected to the Vout(-) pin (Pin 4), and the SENSE(+) pin must
be connected to the Vout(+) pin (Pin 8) to ensure the converter will regulate at the specified output voltage. If these
connections are not made, the converter will deliver an output voltage that is slightly higher than the specified value.
Because the sense leads carry minimal current, large traces on the end-user board are not required. However, sense traces
should be located close to a ground plane to minimize system noise and insure optimum performance. When wiring
discretely, twisted pair wires should be used to connect the sense lines to the load to reduce susceptibility to noise.
The converter’s output over-voltage protection (OVP) senses the voltage across Vout(+) and Vout(-), and not across the
sense lines, so the resistance (and resulting voltage drop) between the output pins of the converter and the load should be
minimized to prevent unwanted triggering of the OVP.
When utilizing the remote sense feature, care must be taken not to exceed the maximum allowable output power capability
of the converter, equal to the product of the nominal output voltage and the allowable output current for the given conditions.
When using remote sense, the output voltage at the converter can be increased by as much as 10% above the nominal
rating in order to maintain the required voltage across the load. Therefore, the designer must, if necessary, decrease the
maximum current (originally obtained from the derating curves) by the same percentage to ensure the converter’s actual
output power remains at or below the maximum allowable output power.
The converter’s output voltage can be adjusted up 10% or down 20% relative to the rated output voltage by the addition of
an externally connected resistor.
The TRIM pin should be left open if trimming is not being used. To minimize noise pickup, a 0.1 µF capacitor is connected
internally between the TRIM and SENSE(-) pins.
To increase the output voltage, refer to Fig. 3. A trim resistor, R
T-INCR
, should be connected between the TRIM (Pin 6) and
SENSE(+) (Pin 7), with a value of:
R
T
INCR
½
where,
5.11
(100
Δ)
V
O
NOM
626
- 10.22
1.225Δ
Δ
[kΩ],
tech.support@psbel.com
Q24S15050
R
T
INCR
½
Required value of trim-up resistor kΩ]
V
O
NOM
½
Nominal value of output voltage [V]
5
Δ½
V
O
REQ
½
(V
O -REQ
V
O -NOM
)
X 100
V
O -NOM
[%]
Desired (trimmed) output voltage [V].
When trimming up, care must be taken not to exceed the converter‘s maximum allowable output power. See the previous
section for a complete discussion of this requirement.
To decrease the output voltage (Figure 4), a trim resistor, R
T-DECR
, should be connected between the TRIM (Pin 6) and SENSE(-
) (Pin 5), with a value of:
R
T
DECR
½
where,
511
10.22
|
Δ
|
[kΩ]
R
T
DECR
½
Required value of trim-down resistor [kΩ] and
Δ
is defined above.
Note:
The above
equations
for calculation of trim resistor values match those typically used in conventional industry-standard quarter-
bricks.
Vin (+)
Q
Family
Converter
TM
Vout (+)
SENSE (+)
R
T-INCR
(Top View)
Vin
ON/OFF
TRIM
SENSE (-)
Rload
Vin (-)
Vout (-)
Figure 3. Configuration for increasing output voltage.
Vin (+)
Q
Family
Converter
TM
Vout (+)
SENSE (+)
TRIM
R
T-DECR
Rload
(Top View)
Vin
ON/OFF
SENSE (-)
Vin (-)
Vout (-)
Figure 4. Configuration for decreasing output voltage.
Trimming/sensing beyond 110% of the rated output voltage is not an acceptable design practice, as this condition could
cause unwanted triggering of the output over-voltage protection (OVP) circuit. The designer should ensure that the difference
between the voltages across the converter’s output pins and its sense pins does not exceed 0.50 V, or:
[V
OUT
(
)
V
OUT
(
)]
[V
SENSE
(
)
V
SENSE
(
)]
0.5
[V]
This equation is applicable for any condition of output sensing and/or output trim.
Asia-Pacific
+86 755 298 85888
Europe, Middle East
+353 61 225 977
North America
+1 408 785 5200
BCD.00741_AB
© 2016 Bel Power Solutions & Protection
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