All voltages are relative to their respective ground. 4.5 V ≤ V
DD1
≤ 5.5 V, 12 V ≤ V
DDA
≤ 18 V, and 12 V ≤ V
DDB
≤ 18 V. All minimum/
maximum specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications are
at T
A
= 25°C, V
DD1
= 5 V, V
DDA
= 15 V, and V
DDB
= 15 V.
Table 1.
Parameter
DC SPECIFICATIONS
Input Supply Current (V
DD1
Pins)
Quiescent
10 Mbps
Output Supply Current (V
DDA
and V
DDB
Pins)
Quiescent
10 Mbps
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
Output Short-Circuit Pulsed Current
1
SWITCHING SPECIFICATIONS
Minimum Pulse Width
2
Maximum Switching Frequency
3
Propagation Delay
4
Change vs. Temperature
Pulse Width Distortion, |t
PLH
− t
PHL
|
Channel-to-Channel Matching,
Rising or Falling Edges
5
Channel-to-Channel Matching,
Rising vs. Falling Edges
6
Part-to-Part Matching, Rising or Falling Edges
7
Part-to-Part Matching, Rising vs. Falling Edges
8
Output Rise/Fall Time (10% to 90%)
1
2
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
I
DDI(Q)
I
DDI(10)
I
DDA(Q)
, I
DDB(Q)
I
DDA(10)
, I
DDB(10)
I
IA
, I
IB
, I
DISABLE
V
IH
V
IL
V
OAH
, V
OBH
V
OAL
, V
OBL
I
OA(SC)
, I
OB(SC)
PW
t
PHL
, t
PLH
PWD
10
97
3.0
6.0
0.3
16
+0.01
4.2
9.0
1.2
22
+10
0.8
mA
mA
mA
mA
µA
V
V
V
V
mA
ns
Mbps
ns
ps/°C
ns
ns
ns
ns
ns
ns
Input t
R
= 3 ns
Input t
R
= 3 ns
−10
2.0
V
DDA
− 0.1,
V
DDB
− 0.1
100
C
L
= 200 pF
0 V ≤ V
IA
, V
IB
, V
DISABLE
≤ V
DD1
V
DDA
, V
DDB
0.1
I
OA
, I
OB
= −1 mA
I
OA
, I
OB
= +1 mA
C
L
= 200 pF
80
124
100
160
8
5
13
55
63
25
t
R
/t
F
Short-circuit duration less than one second.
The minimum pulse width is the shortest pulse width at which the specified timing parameters are guaranteed.
3
The maximum switching frequency is the maximum signal frequency at which the specified timing parameters are guaranteed.
4
t
PHL
propagation delay is measured from the 50% level of the falling edge of the V
Ix
signal to the 50% level of the falling edge of the V
Ox
signal. t
PLH
propagation delay is
measured from the 50% level of the rising edge of the V
Ix
signal to the 50% level of the rising edge of the V
Ox
signal.
5
Channel-to-channel matching, rising or falling edges is the magnitude of the propagation delay difference between two channels of the same part when the inputs
are either both rising or falling edges. The supply voltages and the loads on each channel are equal.
6
Channel-to-channel matching, rising vs. falling edges is the magnitude of the propagation delay difference between two channels of the same part when one input is
a rising edge and the other input is a falling edge. The supply voltages and loads on each channel are equal.
7
Part-to-part matching, rising or falling edges is the magnitude of the propagation delay difference between the same channels of two different parts when the inputs
are either both rising or falling edges. The supply voltages, temperatures, and loads of each part are equal.
8
Part-to-part matching, rising vs. falling edges is the magnitude of the propagation delay difference between the same channels of two different parts when one input
is a rising edge and the other input is a falling edge. The supply voltages, temperatures, and loads of each part are equal.
Rev. C | Page 3 of 12
ADuM1233
PACKAGE CHARACTERISTICS
Table 2.
Parameter
Resistance (Input-to-Output)
1
Capacitance (Input-to-Output)
1
Input Capacitance
IC Junction-to-Ambient Thermal Resistance
1
Data Sheet
Symbol
R
I-O
C
I-O
C
I
θ
JA
Min
Typ
10
12
2.0
4.0
45
Max
Unit
Ω
pF
pF
°C/W
Test Conditions/Comments
f = 1 MHz
The device is considered a two-terminal device: Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together.
REGULATORY INFORMATION
The
ADuM1233
is approved by the organizations listed in Table 3.
Table 3.
UL
Recognized Under 1577 Component Recognition Program
1
Single/Basic 2500 V rms Isolation Voltage
File E214100
1
2
VDE
Certified according to DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12
2
Reinforced insulation, 560 V peak
File 2471900-4880-0001
In accordance with UL 1577, each
ADuM1233
is proof tested by applying an insulation test voltage ≥ 3000 V rms for 1 second (current leakage detection limit = 5 µA).
In accordance with DIN V VDE V 0884-10, each
ADuM1233
is proof tested by applying an insulation test voltage ≥ 1050 V peak for 1 second (partial discharge detection
limit = 5 pC). The asterisk (*) marking branded on the component designates DIN V VDE V 0884-10 approval.
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 4.
Parameter
Rated Dielectric Insulation Voltage
Minimum External Air Gap (Clearance)
Minimum External Tracking (Creepage)
Minimum Internal Gap (Internal Clearance)
Tracking Resistance (Comparative Tracking Index)
Isolation Group
Symbol
L(I01)
L(I02)
Value
2500
3.5 min
3.5 min
0.017 min
>175
IIIa
Unit
V rms
mm
mm
mm
V
Test Conditions/Comments
1 minute duration
Measured from input terminals to output terminals,
shortest distance through air
Measured from input terminals to output terminals,
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