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CD4011AEX

Description
NAND Gate, CMOS, PDIP14
Categorylogic    logic   
File Size218KB,4 Pages
ManufacturerRCA
Download Datasheet Parametric View All

CD4011AEX Overview

NAND Gate, CMOS, PDIP14

CD4011AEX Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerRCA
package instructionDIP, DIP14,.3
Reach Compliance Codeunknown
JESD-30 codeR-PDIP-T14
JESD-609 codee0
Load capacitance (CL)15 pF
Logic integrated circuit typeNAND GATE
MaximumI(ol)0.00014 A
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP14,.3
Package shapeRECTANGULAR
Package formIN-LINE
power supply5/15 V
Prop。Delay @ Nom-Sup100 ns
Schmitt triggerNO
surface mountNO
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
This Material Copyrighted By Its Respective Manufacturer
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