CDP1821CD3 datasheet, PDF - EEWORLD Datasheet

CDP1821CD3: DescriptionStandard SRAM, 1KX1, 255ns, CMOS, CDIP16; Categorystorage storage; File Size113KB，6 Pages; ManufacturerHarris; Websitehttp://www.harris.com/

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CDP1821CD3 Overview

Standard SRAM, 1KX1, 255ns, CMOS, CDIP16

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Harris
package instruction	DIP, DIP16,.3
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Maximum access time	255 ns
I/O type	SEPARATE
JESD-30 code	R-CDIP-T16
JESD-609 code	e0
memory density	1024 bit
Memory IC Type	STANDARD SRAM
memory width	1
Number of functions	1
Number of ports	1
Number of terminals	16
word count	1024 words
character code	1000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	1KX1
Output characteristics	3-STATE
Exportable	NO
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP16,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
power supply	5 V
Certification status	Not Qualified
Filter level	38535Q/M;38534H;883B
Maximum standby current	0.00005 A
Minimum standby current	2.5 V
Maximum slew rate	0.01 mA
Maximum supply voltage (Vsup)	6.5 V
Minimum supply voltage (Vsup)	4 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL

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