VS-ST1200C..K Series
www.vishay.com
Vishay Semiconductors
Phase Control Thyristors
(Hockey PUK Version), 1650 A
FEATURES
• Center amplifying gate
• Metal case with ceramic insulator
• International standard case A-24 (K-PUK)
• High profile hockey PUK
• Designed and qualified for industrial level
• Material categorization: For definitions of compliance
please see
www.vishay.com/doc?99912
TYPICAL APPLICATIONS
A-24 (K-PUK)
• DC motor controls
• Controlled DC power supplies
• AC controllers
PRODUCT SUMMARY
Package
Diode variation
I
T(AV)
V
DRM
/V
RRM
V
TM
I
GT
T
J
A-24 (K-PUK)
Single SCR
1650 A
1200 V, 1400 V, 1600 V, 1800 V, 2000 V
1.73 V
100 mA
-40 °C to 125 °C
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER
I
T(AV)
I
T(RMS)
I
TSM
I
2
t
V
DRM
/V
RRM
t
q
T
J
Typical
T
hs
T
hs
50 Hz
60 Hz
50 Hz
60 Hz
TEST CONDITIONS
VALUES
1650
55
3080
25
30 500
32 000
4651
4250
1200 to 2000
200
-40 to 125
UNITS
A
°C
A
°C
A
kA
2
s
V
μs
°C
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
TYPE NUMBER
VOLTAGE
CODE
12
14
VS-ST1200C..K
16
18
20
Revision: 16-Dec-13
V
DRM
/V
RRM
, MAXIMUM REPETITIVE
PEAK AND OFF-STATE VOLTAGE
V
1200
1400
1600
1800
2000
V
RSM
, MAXIMUM
NON-REPETITIVE PEAK VOLTAGE
V
1300
1500
1700
1900
2100
100
I
DRM
/I
RRM
MAXIMUM
AT T
J
= T
J
MAXIMUM
mA
Document Number: 94394
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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VS-ST1200C..K Series
www.vishay.com
Vishay Semiconductors
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Maximum average on-state current
at heatsink temperature
Maximum RMS on-state current
SYMBOL
I
T(AV)
I
T(RMS)
TEST CONDITIONS
180° conduction, half sine wave
double side (single side) cooled
DC at 25 °C heatsink temperature double side cooled
t = 10 ms
Maximum peak, one-cycle
non-repetitive surge current
I
TSM
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
Maximum I
2
t for fusing
I
2
t
t = 8.3 ms
t = 10 ms
t = 8.3 ms
Maximum I
2
√t
for fusing
Low level value of threshold voltage
High level value of threshold voltage
Low level value of on-state slope resistance
High level value of on-state slope resistance
Maximum on-state voltage
Maximum holding current
Typical latching current
I
2
√t
V
T(TO)1
V
T(TO)2
r
t1
r
t2
V
TM
I
H
I
L
No voltage
reapplied
100 % V
RRM
reapplied
No voltage
reapplied
100 % V
RRM
reapplied
VALUES
1650 (700)
55 (85)
3080
30 500
32 000
25 700
Sinusoidal half wave,
initial T
J
= T
J
maximum
26 900
4651
4250
3300
3000
46 510
0.91
1.01
0.21
0.19
1.73
600
1000
kA
2
√s
V
kA
2
s
A
UNITS
A
°C
t = 0.1 ms to 10 ms, no voltage reapplied
(16.7 % x
π
x I
T(AV)
< I <
π
x I
T(AV)
), T
J
= T
J
maximum
(I >
π
x I
T(AV)
), T
J
= T
J
maximum
(16.7 % x
π
x I
T(AV)
< I <
π
x I
T(AV)
), T
J
= T
J
maximum
(I >
π
x I
T(AV)
), T
J
= T
J
maximum
I
pk
= 4000 A, T
J
= T
J
maximum, t
p
= 10 ms sine pulse
T
J
= 25 °C, anode supply 12 V resistive load
mΩ
V
mA
SWITCHING
PARAMETER
Maximum non-repetitive rate of
rise of turned-on current
Typical delay time
Typical turn-off time
SYMBOL
dI/dt
t
d
t
q
TEST CONDITIONS
Gate drive 20 V, 20
Ω,
t
r
≤
1 μs
T
J
= T
J
maximum, anode voltage
≤
80 % V
DRM
Gate current 1 A, dI
g
/dt = 1 A/μs
V
d
= 0.67 % V
DRM
, T
J
= 25 °C
I
TM
= 550 A, T
J
= T
J
maximum, dI/dt = 40 A/μs,
V
R
= 50 V, dV/dt = 20 V/μs, gate 0 V 100
Ω,
t
p
= 500 μs
VALUES
1000
1.9
μs
200
UNITS
A/μs
BLOCKING
PARAMETER
Maximum critical rate of rise of
off-state voltage
Maximum peak reverse and
off-state leakage current
SYMBOL
dV/dt
I
RRM
,
I
DRM
TEST CONDITIONS
T
J
= T
J
maximum linear to 80 % rated V
DRM
T
J
= T
J
maximum, rated V
DRM
/V
RRM
applied
VALUES
500
100
UNITS
V/μs
mA
Revision: 16-Dec-13
Document Number: 94394
2
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-ST1200C..K Series
www.vishay.com
Vishay Semiconductors
VALUES
TYP.
16
3
3.0
T
J
= T
J
maximum, t
p
≤
5 ms
T
J
= -40 °C
200
100
Maximum required gate trigger/
current/voltage are the lowest
value which will trigger all units
12 V anode to cathode applied
50
1.4
1.1
0.9
Maximum gate current/voltage
not to trigger is the maximum
value which will not trigger any
unit with rated V
DRM
anode to
cathode applied
10
20
5.0
-
200
-
-
3.0
-
mA
V
mA
MAX.
TRIGGERING
PARAMETER
Maximum peak gate power
Maximum average gate power
Maximum peak positive gate current
Maximum peak positive gate voltage
Maximum peak negative gate voltage
SYMBOL
P
GM
P
G(AV)
I
GM
+ V
GM
- V
GM
I
GT
T
J
= 25 °C
T
J
= 125 °C
T
J
= -40 °C
DC gate voltage required to trigger
V
GT
T
J
= 25 °C
T
J
= 125 °C
DC gate current not to trigger
I
GD
T
J
= T
J
maximum
DC gate voltage not to trigger
V
GD
TEST CONDITIONS
T
J
= T
J
maximum, t
p
≤
5 ms
T
J
= T
J
maximum, f = 50 Hz, d% = 50
UNITS
W
A
V
DC gate current required to trigger
0.25
V
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
Maximum operating junction
temperature range
Maximum storage temperature range
Maximum thermal resistance,
junction to heatsink
Maximum thermal resistance,
case to heatsink
Mounting force, ± 10 %
Approximate weight
Case style
See dimensions - link at the end of datasheet
SYMBOL
T
J
T
Stg
R
thJ-hs
R
thC-hs
DC operation single side cooled
DC operation double side cooled
DC operation single side cooled
DC operation double side cooled
TEST CONDITIONS
VALUES
-40 to 125
-40 to 150
0.0.42
0.021
0.006
0.003
24 500
(2500)
425
A-24 (K-PUK)
N
(kg)
g
K/W
UNITS
°C
ΔR
thJC
CONDUCTION
CONDUCTION ANGLE
180°
120°
90°
60°
30°
SINUSOIDAL CONDUCTION
SINGLE SIDE
0.003
0.004
0.005
0.007
0.012
DOUBLE SIDE
0.003
0.004
0.005
0.007
0.012
RECTANGULAR CONDUCTION
SINGLE SIDE
0.002
0.004
0.005
0.007
0.012
DOUBLE SIDE
0.002
0.004
0.005
0.007
0.012
T
J
= T
J
maximum
K/W
TEST CONDITIONS
UNITS
Note
• The table above shows the increment of thermal resistance R
thJC
when devices operate at different conduction angles than DC
Revision: 16-Dec-13
Document Number: 94394
3
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-ST1200C..K Series
www.vishay.com
Vishay Semiconductors
Maximum Allowable Heatsink Temperature (°C)
Maximum Allowable Heatsink Temperature (°C)
130
120
110
100
90
80
70
60
50
40
0
200
130
120
110
100
90
80
70
60
50
40
30
20
0
30°
ST1200C..K Series
(Single Side Cooled)
RthJ-hs (DC) = 0.042 K/W
ST1200C..K Series
(Double Side Cooled)
R thJ-hs (DC) = 0.021 K/W
Conduction Angle
30°
60°
90°
120°
180°
400
600
800 1000 1200
Conduction Period
60° 90°
120° 180°
600 1200
DC
3600
1800 2400 3000
Average On-state Current (A)
Average On-state Current (A)
Fig. 1 - Current Ratings Characteristics
Fig. 4 - Current Ratings Characteristics
Maximum Allowable Heatsink Temperature (°C)
Maximum Allowable Heatsink Temperature (°C)
130
120
110
100
90
80
70
60
50
40
30
20
0
400
30°
ST1200C..K Series
(Single Side Cooled)
R thJ-hs (DC) = 0.042 K/W
4000
3500
3000
2500
2000
1500
1000
500
0
0
Conduction Period
180°
120°
90°
60°
30°
RMS Limit
60°
90°
120°
180°
800
1200
Conduction Angle
ST1200C..K Series
T J = 125°C
400
800
1200
1600
2000
DC
1600
2000
Average On-state Current (A)
Average On-state Current (A)
Fig. 2 - Current Ratings Characteristics
Fig. 5 - On-State Power Loss Characteristics
Maximum Allowable Heatsink Temperature (°C)
130
120
110
100
90
80
70
60
50
40
30
0
400
Maximum Allowable Heatsink Temperature (°C)
ST1200C..K Series
(Double Side Cooled)
R thJ-hs (DC) = 0.021 K/W
5000
4000
3000
2000
1000
0
DC
180°
120°
90°
60°
30°
RMS Limit
Conduction Period
ST1200C..K Series
TJ = 125°C
0
600 1200 1800 2400 3000 3600
Average On-state Current (A)
Conduction Angle
30°
60°
90°
120°
180°
2000
800
1200
1600
Average On-state Current (A)
Fig. 3 - Current Ratings Characteristics
Fig. 6 - On-State Power Loss Characteristics
Revision: 16-Dec-13
Document Number: 94394
4
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-ST1200C..K Series
www.vishay.com
Vishay Semiconductors
Peak Half Sine Wave On-state Current (A)
Peak Half Sine Wave On-state Current (A)
28000
26000
24000
22000
20000
18000
16000
14000
12000
1
At Any Rated Load Condition And With
Rated VRRM Applied Following Surge.
Initial TJ = 125°C
@ 60 Hz 0.0083 s
@ 50 Hz 0.0100 s
32000
30000
Maximum Non Repetitive Surge Current
Versus Pulse Train Duration. Control
Of Conduction May Not Be Maintained.
Initial TJ = 125°C
28000
No Voltage Reapplied
26000
Rated V
RRM
Reapplied
24000
22000
20000
18000
16000
14000
ST1200C..K Series
10
100
ST1200C..K Series
0.1
Pulse Train Duration (s)
12000
0.01
1
Number Of Equal Amplitude Half Cycle Current Pulses (N)
Fig. 7 - Maximum Non-Repetitive Surge Current
Single and Double Side Cooled
Fig. 8 - Maximum Non-Repetitive Surge Current
Single and Double Side Cooled
10000
Instantaneous On-state Current (A)
1000
TJ = 25°C
TJ = 125°C
ST1200C..K Series
100
0.5
1
1.5
2
2.5
3
Instantaneous On-state Voltage (V)
Fig. 9 - On-State Voltage Drop Characteristics
Transient Thermal Impedance Z thJ-hs (K/W)
0.1
Steady State Value
R thJ-hs = 0.042 K/W
(Single Side Cooled)
R thJ-hs = 0.021 K/W
(Double Side Cooled)
(DC Operation)
0.01
ST1200C..K Series
0.001
0.001
0.01
0.1
Square Wave Pulse Duration (s)
1
10
Fig. 10 - Thermal Impedance Z
thJ-hs
Characteristics
Revision: 16-Dec-13
Document Number: 94394
5
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
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