DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ
PA2719GR
SWITCHING
P-CHANNEL POWER MOS FET
PACKAGE DRAWING (Unit: mm)
8
5
1, 2, 3
: Source
4
: Gate
5, 6, 7, 8 : Drain
DESCRIPTION
The
µ
PA2719GR is P-Channel MOS Field Effect Transistor
designed for power management applications of notebook
computers and Li-ion battery protection circuit.
FEATURES
•
Low on-state resistance
R
DS(on)1
= 13 mΩ MAX. (V
GS
=
−10
V, I
D
=
−5.0
A)
R
DS(on)2
= 20.9 mΩ MAX. (V
GS
=
−4.5
V, I
D
=
−5.0
A)
•
Low C
iss
: C
iss
= 2010 pF TYP.
•
Built-in gate protection diode
•
Small and surface mount package (Power SOP8)
6.0 ±0.3
4.4
+0.10
–0.05
1
1.44
4
5.37 MAX.
0.8
1.8 MAX.
0.15
ORDERING INFORMATION
PART NUMBER
PACKAGE
Power SOP8
0.05 MIN.
0.5 ±0.2
0.10
1.27 0.78 MAX.
0.40
+0.10
–0.05
0.12 M
µ
PA2719GR
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C, All terminals are connected.)
Drain to Source Voltage (V
GS
= 0 V)
Gate to Source Voltage (V
DS
= 0 V)
Drain Current (DC)
Drain Current (pulse)
Note1
Note2
Note3
V
DSS
V
GSS
I
D(DC)
I
D(pulse)
P
T1
P
T2
T
ch
T
stg
–30
m20
m10
m100
2
2
150
–55 to + 150
−10
10
V
V
A
A
W
W
°C
°C
A
mJ
Gate
Gate
Protection
Diode
Body
Diode
EQUIVALENT CIRCUIT
Drain
Total Power Dissipation
Total Power Dissipation
Channel Temperature
Storage Temperature
Single Avalanche Current
Single Avalanche Energy
Notes 1.
2.
3.
4.
Note4
Note4
I
AS
E
AS
Source
PW
≤
10
µ
s, Duty Cycle
≤
1%
Mounted on ceramic substrate of 1200 mm
2
x 2.2 mm
Mounted on glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mm, PW = 10 sec
Starting T
ch
= 25°C, V
DD
= –15 V, R
G
= 25
Ω,
L = 100
µ
H, V
GS
= –20
→
0 V
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G16953EJ1V0DS00 (1st edition)
Date Published July 2004 NS CP(K)
Printed in Japan
2004
µ
PA2719GR
ELECTRICAL CHARACTERISTICS (T
A
= 25°C, All terminals are connected.)
CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate Cut-off Voltage
Forward Transfer Admittance
Note
Note
SYMBOL
I
DSS
I
GSS
V
GS(off)
| y
fs
|
R
DS(on)1
R
DS(on)2
R
DS(on)3
TEST CONDITIONS
V
DS
=
−
30 V, V
GS
= 0 V
V
GS
=
m
20 V, V
DS
= 0 V
V
DS
=
−
10 V, I
D
=
−
1 mA
V
DS
=
−
10 V, I
D
=
−
5.0 A
V
GS
=
−
10 V, I
D
=
−
5.0 A
V
GS
=
−
4.5 V, I
D
=
−
5.0 A
V
GS
=
−
4.0 V, I
D
=
−
5.0 A
V
DS
=
−
10 V
V
GS
= 0 V
f = 1 MHz
V
DD
=
−
15 V, I
D
=
−
5.0 A
V
GS
=
−
10 V
R
G
= 10
Ω
MIN.
TYP.
MAX.
UNIT
–
1
m
10
–
1.0
8
10.6
14.2
16.6
2010
460
350
12
15
290
180
13
20.9
25.5
µ
A
µ
A
V
S
mΩ
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
–
2.5
Drain to Source On-state Resistance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Note
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
G
Q
GS
Q
GD
V
F(S-D)
t
rr
Q
rr
V
DD
=
−
24 V
V
GS
=
−
10 V
I
D
=
−
10 A
I
F
= 10 A, V
GS
= 0 V
I
F
= 10 A, V
GS
= 0 V
di/dt = 50 A/
µ
s
43
5.5
12
0.84
105
6.7
Note
Pulsed
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
R
G
= 25
Ω
PG.
V
GS
=
−20 →
0 V
−
I
D
V
DD
50
Ω
L
V
DD
PG.
BV
DSS
V
DS
V
GS
(−)
0
τ
Starting T
ch
τ
= 1
µ
s
Duty Cycle
≤
1%
V
DS
Wave Form
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
R
L
R
G
V
DD
V
DS
(−)
90%
10% 10%
90%
V
GS
(−)
V
GS
Wave Form
0
10%
V
GS
90%
I
AS
V
DS
0
t
d(on)
t
on
t
r
t
d(off)
t
off
t
f
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
I
G
=
−2
mA
PG.
50
Ω
R
L
V
DD
2
Data Sheet G16953EJ1V0DS
µ
PA2719GR
ELECTRICAL CHARACTERISTICS (T
A
= 25°C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
dT - Percentage of Rated Power - %
120
P
T
- Total Power Dissipation - W
100
80
60
40
20
0
0
25
50
75
100
125
150
175
T
A
- Ambient Temperature -
°C
FORWARD BIAS SAFE OPERATING AREA
2.8
2.4
2
1.6
1.2
0.8
0.4
0
0
25
50
75
100
125
150
175
T
A
- Ambient Temperature -
°C
Mounted on ceramic
substrate of
1200 mm
2
x 2.2 mm
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
-1000
-100
-10
-1
-0.1
I
D(pulse)
R
DS(on)
Limited
(at V
GS
=
−10
V)
PW = 100
µs
I
D(DC)
1 ms
DC
Power Dissipation Limited
T
A
= 25°C
Single pulse
Mounted on ceramic substrate of
1200 mm x 2.2 mm
2
I
D
- Drain Current - A
10 ms
100 ms
-0.01
-0.01
-0.1
-1
-10
-100
V
DS
- Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
r
th(ch-A)
- Transient Thermal Resistance -
°C/W
R
th(ch-A)2
100
R
th(ch-A)1
10
1
Single pulse, T
A
= 25°C
R
th(ch-A)1
: Mounted on ceramic substrate of 1200 mm
2
x 2.2 mm
R
th(ch-A)2
: Mounted on glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mm
0.1
100
µ
1m
10 m
100 m
1
10
100
1000
PW - Pulse Width - s
Data Sheet G16953EJ1V0DS
3
µ
PA2719GR
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
-125
Pulsed
I
D
- Drain Current - A
I
D
- Drain Current - A
-100
V
GS
=
−10
V
-75
−4
V
-50
-25
0
0
-0.5
-1
-1.5
-2
V
DS
- Drain to Source Voltage - V
−4.5
V
-10
-100
V
DS
=
−10
V
Pulsed
T
A
= 150°C
75°C
25°C
−40°C
FORWARD TRANSFER CHARACTERISTICS
-1
-0.1
-0.01
0
-1
-2
-3
-4
-5
V
GS
- Gate to Source Voltage - V
GATE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
V
GS(off)
- Gate Cut-off Voltage - V
V
DS
=
−10
V
I
D
=
−1
mA
| y
fs
| - Forward Transfer Admittance - S
-2.5
-2
-1.5
-1
-0.5
0
-50
0
50
100
150
T
ch
- Channel Temperature -
°C
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
100
T
A
= 150°C
75°C
25°C
−40°C
10
1
0.1
V
DS
=
−10
V
Pulsed
0.01
-0.01
-0.1
-1
-10
-100
I
D
- Drain Current - A
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
40
I
D
=
−5
A
Pulsed
30
R
DS(on)
- Drain to Source On-state Resistance - mΩ
40
Pulsed
30
V
GS
=
−10
V
−4.5
V
−4
V
R
DS(on)
- Drain to Source On-state Resistance - mΩ
20
20
10
10
0
-1
-10
-100
-1000
I
D
- Drain Current - A
0
0
-5
-10
-15
-20
V
GS
- Gate to Source Voltage - V
4
Data Sheet G16953EJ1V0DS
µ
PA2719GR
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
30
V
GS
=
−10
V
−4.5
V
−4
V
C
iss
, C
oss
, C
rss
- Capacitance - pF
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
R
DS(on)
- Drain to Source On-state Resistance - mΩ
10000
V
GS
= 0 V
f = 1 MHz
C
iss
20
1000
C
oss
C
rss
100
10
I
D
=
−5
A
Pulsed
0
-50
0
50
100
150
T
ch
- Channel Temperature - °C
10
-0.1
-1
-10
-100
V
DS
- Drain to Source Voltage - V
SWITCHING CHARACTERISTICS
10000
V
DS
- Drain to Source Voltage - V
t
d(on)
, t
r
, t
d(off)
, t
f
- Switching Time - ns
V
DD
=
−15
V
V
GS
=
−10
V
R
G
= 10
Ω
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
-30
I
D
=
−10
A
V
DD
=
−24
V
−15
V
−6
V
-15
V
GS
- Gate to Source Voltage - V
1000
t
d(off)
t
f
t
r
-20
-10
100
-10
V
DS
0
10
t
d(on)
V
GS
-5
1
-0.1
0
0
20
40
60
Q
G
- Gate Charge - nC
-1
-10
-100
I
D
- Drain Current - A
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
1000
100
10
1
0.1
0.01
0
0.2
0.4
0.6
0.8
1
1.2
1.4
V
F(S-D)
- Source to Drain Voltage - V
t
rr
- Reverse Recovery Time - ns
1000
Pulsed
I
F
- Diode Forward Current - A
V
GS
= 0 V
di/dt = 50 A/µs
V
GS
=
−10
V
0V
100
10
0.1
1
10
100
I
F
- Diode Forward Current - A
Data Sheet G16953EJ1V0DS
5
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