K4S511533F-YL1H datasheet, PDF

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K4S511533F-YL1H: DescriptionSynchronous DRAM, 32MX16, 7ns, CMOS, PBGA54; Categorystorage storage; File Size109KB，12 Pages; ManufacturerSAMSUNG; Websitehttp://www.samsung.com/Products/Semiconductor/

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K4S511533F-YL1H Overview

Synchronous DRAM, 32MX16, 7ns, CMOS, PBGA54

K4S511533F-YL1H Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	SAMSUNG
Reach Compliance Code	compliant
Maximum access time	7 ns
Maximum clock frequency (fCLK)	111 MHz
I/O type	COMMON
interleaved burst length	1,2,4,8
JESD-30 code	S-PBGA-B54
JESD-609 code	e0
memory density	536870912 bit
Memory IC Type	SYNCHRONOUS DRAM
memory width	16
Number of terminals	54
word count	33554432 words
character code	32000000
Maximum operating temperature	70 °C
Minimum operating temperature	-25 °C
organize	32MX16
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	FBGA
Encapsulate equivalent code	BGA54,9X9,32
Package shape	SQUARE
Package form	GRID ARRAY, FINE PITCH
power supply	3/3.3 V
Certification status	Not Qualified
refresh cycle	8192
Continuous burst length	1,2,4,8,FP
Maximum standby current	0.001 A
Maximum slew rate	0.15 mA
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM

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K4S511533F - Y(P)C/L/F

8M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA

FEATURES

• 3.0V & 3.3V power supply.

• LVCMOS compatible with multiplexed address.

• Four banks operation.

• MRS cycle with address key programs.

-. CAS latency (1, 2 & 3).

-. Burst length (1, 2, 4, 8 & Full page).

-. Burst type (Sequential & Interleave).

• EMRS cycle with address key programs.

• All inputs are sampled at the positive going edge of the system

clock.

• Burst read single-bit write operation.

• Special Function Support.

-. PASR (Partial Array Self Refresh).

-. Internal TCSR (Temperature Compensated Self Refresh)

• DQM for masking.

• Auto refresh.

•

64ms refresh period (8K cycle).

Commercial Temperature Operation (-25°C ~ 70°C).

2 /CS Support.

2Chips DDP 54Balls FBGA( -YXXX -Pb, -PXXX -Pb Free).

Mobile SDRAM

GENERAL DESCRIPTION

The K4S511533F is 536,870,912 bits synchronous high data

rate Dynamic RAM organized as 4 x 8,388,608 words by 16 bits,

fabricated with SAMSUNG’s high performance CMOS technol-

ogy. Synchronous design allows precise cycle control with the

use of system clock and I/O transactions are possible on every

clock cycle. Range of operating frequencies, programmable

burst lengths and programmable latencies allow the same

device to be useful for a variety of high bandwidth and high per-

formance memory system applications.

ORDERING INFORMATION

Part No.

K4S511533F-Y(P)C/L/F75

K4S511533F-Y(P)C/L/F1H

K4S511533F-Y(P)C/L/F1L

Max Freq.

133MHz(CL3), 111MHz(CL2)

111MHz(CL2)

111MHz(CL=3)*1, 83MHz(CL2)

LVCMOS

54 FBGA Pb

(Pb Free)

Interface

Package

- Y(P)C/L/F : Normal / Low Power, Commercial Temperature(-25°C ~ 70°C)

NOTES :

1. In case of 40MHz Frequency, CL1 can be supported.

2. Samsung are not designed or manufactured for use in a device or system that is used under circumstance in which human life is potentially at stake.

Please contact to the memory marketing team in samsung electronics when considering the use of a product contained herein for any specific pur

pose, such as medical, aerospace, nuclear, military, vehicular or undersea repeater use.

Address configuration

Organization

32M x16

Bank

BA0,BA1

Row

A0 - A12

Column Address

A0 - A8

September 2004

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Is it Rohs certified?	incompatible	conform to	conform to	conform to	conform to	incompatible	incompatible	conform to
Maker	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant	compliant	compli
Maximum access time	7 ns	5.4 ns	7 ns	7 ns	7 ns	7 ns	7 ns	7 ns
Maximum clock frequency (fCLK)	111 MHz	133 MHz	111 MHz	111 MHz	111 MHz	111 MHz	111 MHz	111 MHz
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
interleaved burst length	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8
JESD-30 code	S-PBGA-B54	S-PBGA-B54	S-PBGA-B54	S-PBGA-B54	S-PBGA-B54	S-PBGA-B54	S-PBGA-B54	S-PBGA-B54
memory density	536870912 bit	536870912 bit	536870912 bit	536870912 bit	536870912 bit	536870912 bit	536870912 bit	536870912 bi
Memory IC Type	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM
memory width	16	16	16	16	16	16	16	16
Number of terminals	54	54	54	54	54	54	54	54
word count	33554432 words	33554432 words	33554432 words	33554432 words	33554432 words	33554432 words	33554432 words	33554432 words
character code	32000000	32000000	32000000	32000000	32000000	32000000	32000000	32000000
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
Minimum operating temperature	-25 °C	-25 °C	-25 °C	-25 °C	-25 °C	-25 °C	-25 °C	-25 °C
organize	32MX16	32MX16	32MX16	32MX16	32MX16	32MX16	32MX16	32MX16
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	FBGA	FBGA	FBGA	FBGA	FBGA	FBGA	FBGA	FBGA
Encapsulate equivalent code	BGA54,9X9,32	BGA54,9X9,32	BGA54,9X9,32	BGA54,9X9,32	BGA54,9X9,32	BGA54,9X9,32	BGA54,9X9,32	BGA54,9X9,32
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH
power supply	3/3.3 V	3/3.3 V	3/3.3 V	3/3.3 V	3/3.3 V	3/3.3 V	3/3.3 V	3/3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
refresh cycle	8192	8192	8192	8192	8192	8192	8192	8192
Continuous burst length	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP
Maximum standby current	0.001 A	0.001 A	0.001 A	0.001 A	0.001 A	0.001 A	0.001 A	0.001 A
Maximum slew rate	0.15 mA	0.16 mA	0.15 mA	0.15 mA	0.15 mA	0.15 mA	0.13 mA	0.13 mA
surface mount	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	OTHER	OTHER	OTHER	OTHER	OTHER	OTHER	OTHER	OTHER
Terminal form	BALL	BALL	BALL	BALL	BALL	BALL	BALL	BALL
Terminal pitch	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM

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