TC55B417P-12 datasheet, PDF - EEWORLD Datasheet

TC55B417P-12: DescriptionIC 16K X 4 CACHE SRAM, 12 ns, PDIP24, 0.300 INCH, PLASTIC, DIP-24, Static RAM; Categorystorage storage; File Size59KB，1 Pages; ManufacturerToshiba Semiconductor; Websitehttp://toshiba-semicon-storage.com/

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TC55B417P-12 Overview

IC 16K X 4 CACHE SRAM, 12 ns, PDIP24, 0.300 INCH, PLASTIC, DIP-24, Static RAM

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Toshiba Semiconductor
Parts packaging code	DIP
package instruction	DIP, DIP24,.3
Contacts	24
Reach Compliance Code	unknown
ECCN code	EAR99
Maximum access time	12 ns
I/O type	COMMON
JESD-30 code	R-PDIP-T24
JESD-609 code	e0
length	29.8 mm
memory density	65536 bit
Memory IC Type	CACHE SRAM
memory width	4
Number of functions	1
Number of ports	1
Number of terminals	24
word count	16384 words
character code	16000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	16KX4
Output characteristics	3-STATE
Exportable	YES
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP24,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	240
power supply	5 V
Certification status	Not Qualified
Maximum seat height	4.45 mm
Maximum standby current	0.01 A
Maximum slew rate	0.12 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	BICMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm

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