TDA8933B
Class D audio amplifier
Rev. 01 — 23 October 2008
Preliminary data sheet
1. General description
The TDA8933B is a high-efficiency class D amplifier with low power dissipation.
The continuous time output power is 2
×
10 W in a stereo half-bridge application
(R
L
= 8
Ω)
or 1
×
20 W in a mono full-bridge application (R
L
=16
Ω).
Due to the low power
dissipation the device can be used without any external heat sink when playing music.
Due to the implementation of Thermal Foldback (TF) the device remains operating with
considerable music output power without the need for an external heat sink, even for high
supply voltages and/or lower load impedances.
The device has two full differential inputs driving two independent outputs. It can be used
in a mono full-bridge configuration (Bridge-Tied Load (BTL)) or as stereo half-bridge
configuration (Single-Ended (SE)).
2. Features
Operating voltage from 10 V to 36 V asymmetrical or
±5
V to
±18
V symmetrical
Mono bridge-tied load (full-bridge) or stereo single-ended (half-bridge) application
Application without heat sink using thermally enhanced small outline package
High efficiency and low-power dissipation
Thermal foldback to avoid audio holes
Current limiting to avoid audio holes
Full short circuit proof across load and to supply lines (using advanced current
protection)
I
Internal or external oscillator (master-slave setting) that can be switched
I
No pop noise
I
Full differential inputs
I
I
I
I
I
I
I
3. Applications
I
I
I
I
I
I
Flat-panel television sets
Flat-panel monitor sets
Multimedia systems
Wireless speakers
Mini/micro systems
Home sound sets
NXP Semiconductors
TDA8933B
Class D audio amplifier
4. Quick reference data
Table 1.
Quick reference data
General; V
p
= 25 V, f
osc
= 320 kHz, T
amb
= 25
°
C unless specified otherwise
Symbol Parameter
V
P
I
P
I
q(tot)
supply voltage
supply current
total quiescent
current
RMS output power
Conditions
asymmetrical supply
Sleep mode
Operating mode; no load; no
snubbers or filter connected
Min
10
-
-
Typ
25
0.6
40
Max
36
1.0
50
Unit
V
mA
mA
Stereo SE channel; R
s
< 0.1
Ω
[1]
P
o(RMS)
continuous time output power per channel
[2]
R
L
= 4
Ω;
V
P
= 17 V
THD+N = 10 %, f
i
= 1 kHz
R
L
= 8
Ω;
V
P
= 25 V
THD+N = 10 %, f
i
= 1 kHz
Mono BTL channel; R
s
< 0.1
Ω
[1]
P
o(RMS)
RMS output power
continuous time output power
[2]
R
L
= 8
Ω;
V
P
= 17 V
THD+N = 10 %, f
i
= 1 kHz
R
L
= 16
Ω;
V
P
= 25 V
THD+N = 10 %, f
i
= 1 kHz
[1]
[2]
7.5
9.3
8.5
10.3
-
-
W
W
15.4
18.9
17.1
20.6
-
-
W
W
R
s
is the total series resistance of an inductor and an ESR single-ended capacitor in the application.
Output power is measured indirectly, based on R
DSon
measurement.
5. Ordering information
Table 2.
Ordering information
Package
Name
TDA8933BTW
Description
Version
SOT549-1
HTSSOP32 plastic thermal enhanced thin shrink small outline package; 32 leads;
body width 6.1 mm; lead pitch 0.65 mm; exposed die pad
Type number
TDA8933B_1
© NXP B.V. 2008. All rights reserved.
Preliminary data sheet
Rev. 01 — 23 October 2008
2 of 42
NXP Semiconductors
TDA8933B
Class D audio amplifier
6. Block diagram
OSCREF
OSCIO
V
DDA
8
28
OSCILLATOR
DRIVER
HIGH
V
SSD
PWM
MODULATOR
CTRL
DRIVER
LOW
26
29
27
BOOT1
V
DDP1
OUT1
V
SSP1
10
31
IN1P
2
IN1N
INREF
IN2P
3
12
15
PWM
MODULATOR
14
PROTECTIONS:
OVP, OCP, OTP,
UVP, TF, WP
MANAGER
21
20
DRIVER
HIGH
CTRL
DRIVER
LOW
23
22
BOOT2
V
DDP2
OUT2
V
SSP2
IN2N
V
DDA
STABILIZER 11 V
25
STAB1
DIAG
4
V
DDA
V
SSP1
24
STABILIZER 11 V
CGND
7
V
SSP2
STAB2
POWERUP
6
REGULATOR 5 V
MODE
V
SSD
18
DREF
ENGAGE
5
V
DDA
11
HVPREF
30
HVP1
TEST
13
TDA8933BTW
V
SSA
19
HVP2
HALF SUPPLY VOLTAGE
9
1, 16, 17, 32
010aaa455
V
SSA
V
SSD(HW)
Fig 1.
Block diagram
TDA8933B_1
© NXP B.V. 2008. All rights reserved.
Preliminary data sheet
Rev. 01 — 23 October 2008
3 of 42
NXP Semiconductors
TDA8933B
Class D audio amplifier
7. Pinning information
7.1 Pinning
V
SSD(HW)
IN1P
IN1N
DIAG
ENGAGE
POWERUP
CGND
V
DDA
V
SSA
1
2
3
4
5
6
7
8
9
32 V
SSD(HW)
31 OSCIO
30 HVP1
29 V
DDP1
28 BOOT1
27 OUT1
26 V
SSP1
25 STAB1
24 STAB2
23 V
SSP2
22 OUT2
21 BOOT2
20 V
DDP2
19 HVP2
18 DREF
17 V
SSD(HW)
010aaa456
TDA8933BTW
OSCREF 10
HVPREF 11
INREF 12
TEST 13
IN2N 14
IN2P 15
V
SSD(HW)
16
Fig 2.
Pin configuration diagram (HTSSOP32 package)
7.2 Pin description
Table 3.
Symbol
V
SSD(HW)
IN1P
IN1N
DIAG
ENGAGE
POWERUP
CGND
V
DDA
V
SSA
OSCREF
HVPREF
INREF
TEST
IN2N
IN2P
V
SSD(HW)
V
SSD(HW)
DREF
TDA8933B_1
Pinning description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Description
negative digital supply voltage and handle wafer connection
positive audio input for channel 1
negative audio input for channel 1
diagnostic output; open-drain
engage input to switch between Mute mode and Operating mode
power-up input to switch between Sleep mode and Mute mode
control ground; reference for POWERUP, ENGAGE and DIAG
positive analog supply voltage
negative analog supply voltage
input internal oscillator setting (only master setting)
decoupling of internal half supply voltage reference
decoupling for input reference voltage
test signal input; for testing purpose only
negative audio input for channel 2
positive audio input for channel 2
negative digital supply voltage and handle wafer connection
negative digital supply voltage and handle wafer connection
decoupling of internal (reference) 5 V regulator for logic supply
© NXP B.V. 2008. All rights reserved.
Preliminary data sheet
Rev. 01 — 23 October 2008
4 of 42
NXP Semiconductors
TDA8933B
Class D audio amplifier
Pinning description
…continued
Pin
19
20
21
22
23
24
25
26
27
28
29
30
31
32
-
Description
half supply output voltage 2 for charging single-ended capacitor for
channel 2
positive power supply voltage for channel 2
bootstrap high-side driver channel 2
Pulse Width Modulated (PWM) output channel 2
negative power supply voltage for channel 2
decoupling of internal 11 V regulator for channel 2 drivers
decoupling of internal 11 V regulator for channel 1 drivers
negative power supply voltage for channel 1
PWM output channel 1
bootstrap high-side driver for channel 1
positive power supply voltage for channel 1
half supply output voltage 1 for charging single-ended capacitor for
channel 1
oscillator input in slave configuration or oscillator output in master
configuration
negative digital supply voltage and handle wafer connection
Table 3.
Symbol
HVP2
V
DDP2
BOOT2
OUT2
V
SSP2
STAB2
STAB1
V
SSP1
OUT1
BOOT1
V
DDP1
HVP1
OSCIO
V
SSD(HW)
Exposed die
pad
[1]
[1]
The exposed die pad has to be connected to V
SSD(HW)
.
8. Functional description
8.1 General
The TDA8933B is a mono full-bridge or stereo half-bridge audio power amplifier using
class D technology. The audio input signal is converted into a PWM signal via an analog
input stage and a PWM modulator. To enable the output power Diffusion Metal Oxide
Semiconductor (DMOS) transistors to be driven, this digital PWM signal is applied to a
control and handshake block and driver circuits for both the high side and low side. A
2
nd
-order low-pass filter in the application converts the PWM signal to an analog audio
signal across the loudspeakers.
The TDA8933B contains two independent half bridges with full differential input stages.
The loudspeakers can be connected in the following configurations:
•
Mono full-bridge: Bridge-Tied Load (BTL)
•
Stereo half-bridge: Single-Ended (SE)
The TDA8933B contains circuits common to both channels such as the oscillator, all
reference sources, the mode functionality and a digital timing manager. The following
protections are built-in: thermal foldback and overtemperature, current and voltage
protections.
TDA8933B_1
© NXP B.V. 2008. All rights reserved.
Preliminary data sheet
Rev. 01 — 23 October 2008
5 of 42