CDR33BP332AJMM datasheet, PDF - EEWORLD Datasheet

CDR33BP332AJMM: DescriptionCeramic Capacitor, Multilayer, Ceramic, 50V, 5% +Tol, 5% -Tol, BP, 30ppm/Cel TC, 0.0033uF, Surface Mount, 1210, CHIP; CategoryPassive components capacitor; File Size46KB，4 Pages; ManufacturerAVX

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CDR33BP332AJMM Overview

Ceramic Capacitor, Multilayer, Ceramic, 50V, 5% +Tol, 5% -Tol, BP, 30ppm/Cel TC, 0.0033uF, Surface Mount, 1210, CHIP

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	AVX
package instruction	, 1210
Reach Compliance Code	compliant
ECCN code	EAR99
Factory Lead Time	28 weeks
capacitance	0.0033 µF
Capacitor type	CERAMIC CAPACITOR
dielectric materials	CERAMIC
high	1.5 mm
JESD-609 code	e4
length	3.2 mm
Installation features	SURFACE MOUNT
multi-layer	Yes
negative tolerance	5%
Number of terminals	2
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package shape	RECTANGULAR PACKAGE
Package form	SMT
method of packing	BULK
positive tolerance	5%
Rated (DC) voltage (URdc)	50 V
Guideline	MIL-PRF-55681/9
size code	1210
surface mount	YES
Temperature characteristic code	BP
Temperature Coefficient	30ppm/Cel ppm/°C
Terminal surface	Palladium/Silver (Pd/Ag)
Terminal shape	WRAPAROUND
width	2.5 mm

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