Field Programmable Gate Array, 657MHz, 33192-Cell, CMOS, PBGA400,
Parameter Name | Attribute value |
Is it lead-free? | Contains lead |
Is it Rohs certified? | incompatible |
Maker | XILINX |
package instruction | FBGA-400 |
Reach Compliance Code | not_compliant |
maximum clock frequency | 657 MHz |
Combined latency of CLB-Max | 0.66 ns |
JESD-30 code | S-PBGA-B400 |
JESD-609 code | e0 |
length | 21 mm |
Humidity sensitivity level | 3 |
Configurable number of logic blocks | 3688 |
Equivalent number of gates | 1600000 |
Number of entries | 304 |
Number of logical units | 33192 |
Output times | 232 |
Number of terminals | 400 |
Maximum operating temperature | 85 °C |
Minimum operating temperature | |
organize | 3688 CLBS, 1600000 GATES |
Package body material | PLASTIC/EPOXY |
encapsulated code | BGA |
Encapsulate equivalent code | BGA400,20X20,40 |
Package shape | SQUARE |
Package form | GRID ARRAY |
Peak Reflow Temperature (Celsius) | 225 |
power supply | 1.2,1.2/3.3,2.5 V |
Programmable logic type | FIELD PROGRAMMABLE GATE ARRAY |
Certification status | Not Qualified |
Maximum seat height | 2.43 mm |
Maximum supply voltage | 1.26 V |
Minimum supply voltage | 1.14 V |
Nominal supply voltage | 1.2 V |
surface mount | YES |
technology | CMOS |
Temperature level | OTHER |
Terminal surface | Tin/Lead (Sn63Pb37) |
Terminal form | BALL |
Terminal pitch | 1 mm |
Terminal location | BOTTOM |
Maximum time at peak reflow temperature | 30 |
width | 21 mm |