X28HC256KI-90 datasheet, PDF - EEWORLD Datasheet

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X28HC256KI-90: Description32KX8 EEPROM 5V, 90ns, CPGA28, CERAMIC, PGA-28; Categorystorage storage; File Size492KB，17 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/

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X28HC256KI-90 Overview

32KX8 EEPROM 5V, 90ns, CPGA28, CERAMIC, PGA-28

X28HC256KI-90 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Renesas Electronics Corporation
Parts packaging code	PGA
package instruction	CERAMIC, PGA-28
Contacts	28
Reach Compliance Code	not_compliant
ECCN code	EAR99
Maximum access time	90 ns
command user interface	NO
Data polling	YES
Durability	1000000 Write/Erase Cycles
JESD-30 code	R-CPGA-P28
JESD-609 code	e0
length	16.51 mm
memory density	262144 bit
Memory IC Type	EEPROM
memory width	8
Number of functions	1
Number of terminals	28
word count	32768 words
character code	32000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	32KX8
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Encapsulate equivalent code	PGA28,5X6
Package shape	RECTANGULAR
Package form	GRID ARRAY
page size	128 words
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Programming voltage	5 V
Certification status	Not Qualified
Maximum seat height	4.62 mm
Maximum standby current	0.0005 A
Maximum slew rate	0.06 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
Maximum time at peak reflow temperature	NOT SPECIFIED
switch bit	YES
width	14 mm
Maximum write cycle time (tWC)	5 ms

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X28HC256

256k, 32k x 8-Bit

Data Sheet

September 21, 2011

FN8108.3

5V, Byte Alterable EEPROM

The X28HC256 is a second generation high performance

CMOS 32k x 8 EEPROM. It is fabricated with Intersil’s

proprietary, textured poly floating gate technology, providing

a highly reliable 5V only nonvolatile memory.

The X28HC256 supports a 128-byte page write operation,

effectively providing a 24µs/byte write cycle, and enabling

the entire memory to be typically rewritten in less than 0.8

seconds. The X28HC256 also features DATA Polling and

Toggle Bit Polling, two methods of providing early end of

write detection. The X28HC256 also supports the JEDEC

standard Software Data Protection feature for protecting

against inadvertent writes during power-up and power-down.

Endurance for the X28HC256 is specified as a minimum

1,000,000 write cycles per byte and an inherent data

retention of 100 years.

Features

• Access time: 70ns

• Simple byte and page write

- Single 5V supply

- No external high voltages or V

P-P

control circuits

- Self-timed

- No erase before write

- No complex programming algorithms

- No overerase problem

• Low power CMOS

- Active: 60mA

- Standby: 500µA

• Software data protection

- Protects data against system level inadvertent writes

• High speed page write capability

• Highly reliable Direct Write

™

cell

- Endurance: 1,000,000 cycles

- Data retention: 100 years

• Early end of write detection

- DATA polling

- Toggle bit polling

• Pb-free available (RoHS compliant)

Block Diagram

X BUFFERS

LATCHES AND

DECODER

TO A

ADDRESS

INPUTS

Y BUFFERS

LATCHES AND

DECODER

I/O BUFFERS

AND LATCHES

256kBIT

EEPROM

ARRAY

I/O

TO I/O

CONTROL

LOGIC AND

TIMING

DATA INPUTS/OUTPUTS

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.

All other trademarks mentioned are the property of their respective owners.

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