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5V41235PGG8

Description
TSSOP-16, Reel
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size401KB,19 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance  
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5V41235PGG8 Overview

TSSOP-16, Reel

5V41235PGG8 Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP16,.25
Contacts16
Manufacturer packaging codePGG16
Reach Compliance Codecompliant
ECCN codeEAR99
Samacsys DescriptionTSSOP 4.4 MM 0.65MM PITCH
JESD-30 codeR-PDSO-G16
JESD-609 codee3
length5 mm
Humidity sensitivity level1
Number of terminals16
Maximum operating temperature70 °C
Minimum operating temperature
Maximum output clock frequency200 MHz
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP16,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Master clock/crystal nominal frequency25 MHz
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum slew rate85 mA
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width4.4 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, PROCESSOR SPECIFIC
DATASHEET
2 OUTPUT PCIE GEN1/2/3 SYNTHESIZER
Recommended Applications
2 Output synthesizer for PCIe Gen1/2/3 and Ethernet
5V41235
Features/Benefits
16-pin TSSOP and QFN packages; small board footprint
Spread-spectrum capable; reduces EMI
Outputs can be terminated to LVDS; can drive a wider
variety of devices
General Description
The 5V41235 is a PCIe Gen2/3 compliant spread spectrum
capable clock generator. The device has 2 differential
HCSL outputs and can be used in communication or
embedded systems to substantially reduce
electro-magnetic interference (EMI). The spread amount
and output frequency are selectable via select pins. The
5V41235 can also supply 25 MHz, 125 MHz and 200 MHz
outputs for applications such as Ethernet.
TSSOP package: 25MHz, 100MHz, 125MHz and
200MHz output frequencies.
QFN package: 100MHz and 200MHz output frequencies.
OE control pin; greater system power management
Spread% and frequency pin selection; no software
required to configure device
Industrial temperature range available; supports
Output Features
2 - 0.7V current mode differential HCSL output pairs
demanding embedded applications
Key Specifications
Cycle-to-cycle jitter < 100 ps
Output-to-output skew < 50 ps
PCIe Gen2 phase jitter < 3.0ps RMS
PCIe Gen3 phase jitter <1.0ps RMS
Block Diagram
VDD
2
SS1:SS0
2
CLK0
Control
Logic
Phase Lock Loop
CLK1
CLK1
CLK0
S1:S0
2
X1/ICLK
25 MHz
crystal or clock X2
Optional tuning crystal
capacitors
Clock
Buffer/
Crystal
Oscillator
2
GND
OE
Rr(IREF)
IDT®
2 OUTPUT PCIE GEN1/2/3 SYNTHESIZER
1
5V41235
MAY 5, 2017

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5V41235PGG8 2183LDMA050GTN38E0 2183LDMA050GTN4810 5V41235NLG 5V41235PGGI8 5V41235NLG8 5V41235NLGI8
Description TSSOP-16, Reel CAP,AL2O3,18MF,25VDC,20% -TOL,20% +TOL CAP,AL2O3,18MF,25VDC,20% -TOL,20% +TOL VFQFPN-16, Tube TSSOP-16, Reel VFQFPN-16, Reel VFQFPN-16, Reel
package instruction TSSOP, TSSOP16,.25 , , HVQCCN, LCC16,.12SQ,20 TSSOP, TSSOP16,.25 HVQCCN, LCC16,.12SQ,20 HVQCCN, LCC16,.12SQ,20
Reach Compliance Code compliant unknown unknown compliant compliant compliant compliant
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
length 5 mm 50 mm 50 mm 3 mm 5 mm 3 mm 3 mm
Number of terminals 16 2 2 16 16 16 16
Maximum operating temperature 70 °C 85 °C 85 °C 70 °C 85 °C 70 °C 85 °C
Minimum operating temperature - -40 °C -40 °C - -40 °C - -40 °C
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH Screw Ends Screw Ends CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Brand Name Integrated Device Technology - - Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology
Is it lead-free? Lead free - - Lead free Lead free Lead free Lead free
Is it Rohs certified? conform to - - conform to conform to conform to conform to
Maker IDT (Integrated Device Technology) - - IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code TSSOP - - VFQFPN TSSOP VFQFPN VFQFPN
Contacts 16 - - 16 16 16 16
Manufacturer packaging code PGG16 - - NLG16P2 PGG16 NLG16P2 NLG16P2
Samacsys Description TSSOP 4.4 MM 0.65MM PITCH - - - TSSOP 4.4 MM 0.65MM PITCH VFQFN- N 3 X 3 X 1.0 MM - NO LEAD VFQFN- N 3 X 3 X 1.0 MM - NO LEAD
JESD-30 code R-PDSO-G16 - - S-XQCC-N16 R-PDSO-G16 S-XQCC-N16 S-XQCC-N16
JESD-609 code e3 - - e3 e3 e3 e3
Humidity sensitivity level 1 - - 3 1 3 3
Maximum output clock frequency 200 MHz - - 200 MHz 200 MHz 200 MHz 200 MHz
Package body material PLASTIC/EPOXY - - UNSPECIFIED PLASTIC/EPOXY UNSPECIFIED UNSPECIFIED
encapsulated code TSSOP - - HVQCCN TSSOP HVQCCN HVQCCN
Encapsulate equivalent code TSSOP16,.25 - - LCC16,.12SQ,20 TSSOP16,.25 LCC16,.12SQ,20 LCC16,.12SQ,20
Package shape RECTANGULAR - - SQUARE RECTANGULAR SQUARE SQUARE
Peak Reflow Temperature (Celsius) 260 - - 260 260 260 260
power supply 3.3 V - - 3.3 V 3.3 V 3.3 V 3.3 V
Master clock/crystal nominal frequency 25 MHz - - 25 MHz 25 MHz 25 MHz 25 MHz
Certification status Not Qualified - - Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.2 mm - - 1 mm 1.2 mm 1 mm 1 mm
Maximum slew rate 85 mA - - 85 mA 85 mA 85 mA 85 mA
Maximum supply voltage 3.465 V - - 3.465 V 3.465 V 3.465 V 3.465 V
Minimum supply voltage 3.135 V - - 3.135 V 3.135 V 3.135 V 3.135 V
Nominal supply voltage 3.3 V - - 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES - - YES YES YES YES
technology CMOS - - CMOS CMOS CMOS CMOS
Temperature level COMMERCIAL - - COMMERCIAL INDUSTRIAL COMMERCIAL INDUSTRIAL
Terminal surface Matte Tin (Sn) - - Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn) - annealed
Terminal form GULL WING - - NO LEAD GULL WING NO LEAD NO LEAD
Terminal pitch 0.65 mm - - 0.5 mm 0.65 mm 0.5 mm 0.5 mm
Terminal location DUAL - - QUAD DUAL QUAD QUAD
Maximum time at peak reflow temperature NOT SPECIFIED - - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 4.4 mm - - 3 mm 4.4 mm 3 mm 3 mm
uPs/uCs/peripheral integrated circuit type CLOCK GENERATOR, PROCESSOR SPECIFIC - - CLOCK GENERATOR, PROCESSOR SPECIFIC CLOCK GENERATOR, PROCESSOR SPECIFIC CLOCK GENERATOR, PROCESSOR SPECIFIC CLOCK GENERATOR, PROCESSOR SPECIFIC
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