SSM6K407TU
TOSHIBA Field-Effect Transistor Silicon N-Channel MOS Type
SSM6K407TU
○
DC−DC Converter, Relay Drive and Motor Drive
Applications
Unit: mm
2.1±0.1
1.7±0.1
0.65 0.65
4V drive
Low ON-resistance
: R
on
= 440mΩ (max) (@V
GS
= 4 V)
: R
on
= 300mΩ (max) (@V
GS
= 10 V)
2
3
5
4
Absolute Maximum Ratings
(Ta = 25℃) (Note)
Characteristic
Drain–source voltage
Gate–source voltage
Drain current
Drain power dissipation
Channel temperature
Storage temperature
DC
Pulse
Symbol
V
DSS
V
GSS
I
D
I
DP
P
D
(Note1)
T
ch
T
stg
Rating
60
±20
2
6
500
150
−55
to 150
Unit
V
V
0.7±0.05
UF6
1,2,5,6 : Drain
3
: Gate
4
: Source
JEDEC
A
mW
°C
°C
⎯
⎯
2-2T1D
JEITA
TOSHIBA
Weight: 7mg (typ.)
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: Mounted on an FR4 board
2
(25.4 mm
×
25.4 mm
×
1.6 t, Cu Pad: 645 mm )
Start of commercial production
2008-01
1
2014-03-01
0.166±0.05
+0.1
0.3-0.05
2.0±0.1
1.3±0.1
1
6
SSM6K407TU
Electrical Characteristics (Ta = 25℃)
Characteristic
Gate leakage current
Drain cutoff current
Drain–source breakdown voltage
Gate threshold voltage
Drain–source ON-resistance
Forward transfer admittance
Input capacitance
Reverse transfer capacitance
Output capacitance
Switching time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Drain–source forward voltage
Turn-on time
Turn-off time
Symbol
I
GSS
I
DSS
V
(BR) DSS
V
th
R
DS (ON)
|Y
fs
|
C
iss
C
rss
C
oss
t
on
t
off
Q
g
Q
gs
Q
gd
V
DSF
I
D
= -2 A, V
GS
= 0 V
(Note2)
V
DD
= 48 V, V
GS
= 10 V, I
D
= 2 A
V
DD
= 30 V, I
D
=
1 A
V
GS
=
0 to 10 V, R
G
=
50
Ω
V
DS
= 10 V, V
GS
= 0 V, f = 1 MHz
Test Condition
V
GS
= ±16 V, V
DS
= 0 V
V
DS
= 60 V, V
GS
= 0 V
I
D
= 10 mA, V
GS
= 0 V
V
DS
= 10 V, l
D
= 1 mA
V
GS
= 4 V, I
D
= 1 A
V
GS
= 10 V, I
D
= 1 A
V
DS
= 10 V, I
D
= 1 A
(Note2)
(Note2)
(Note2)
Min
―
―
60
0.8
―
―
1.0
―
―
―
―
―
―
―
―
―
Typ.
―
―
―
―
0.33
0.22
2.0
150
25
70
30
150
6.0
4.6
1.4
-1.0
Max
±10
100
―
2.0
0.44
0.30
―
―
―
―
―
―
―
―
―
−1.5
V
nC
ns
pF
Unit
μA
μA
V
V
Ω
S
Note 2: Pulse test
2
2014-03-01
SSM6K407TU
Switching Time Test Circuit
(a) Test Circuit
10V
0
10
μs
V
V
DD
=
30 V
R
G
=
50
Ω
Duty
≤
1%
V
IN
: t
r
, t
f
<
5 ns
Common Source
Ta
=
25°C
(b) V
IN
10 V
10%
90%
IN
R
G
0V
V
DD
(c) V
OUT
V
DS (ON)
t
on
t
r
90%
10%
t
f
t
off
V
DD
Marking
6
5
4
Equivalent Circuit
(top view)
6
5
4
KNF
1
2
3
1
2
3
Notice on Usage
V
th
can be expressed as the voltage between gate and source when the low operating current value is I
D
= 1 mA for
this product. For normal switching operation, V
GS (on)
requires a higher voltage than V
th
and V
GS (off)
requires a lower
voltage than V
th.
(The relationship can be established as follows: V
GS (off)
< V
th
< V
GS (on).
)
Take this into consideration when using the device.
Handling Precaution
When handling individual devices that are not yet mounted on a circuit board, make sure that the environment is
protected against electrostatic discharge. Operators should wear antistatic clothing, and containers and other objects that
come into direct contact with devices should be made of antistatic materials.
3
2014-03-01
SSM6K407TU
4
2014-03-01
SSM6K407TU
5
2014-03-01
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