SUPPLEMENT
Am29F100 Known Good Die
1 Megabit (128 K x 8-Bit/64 K x 16-Bit)
CMOS 5.0 Volt-only, Boot Sector Flash Memory—Die Revision 1
DISTINCTIVE CHARACTERISTICS
s
Single power supply operation
— 5.0 V
±
10% for read, erase, and program
operations
— Simplifies system-level power requirements
s
High performance
— 120 ns maximum access time
s
Low power consumption
— 20 mA typical active read current for byte mode
— 28 mA typical active read current for word mode
— 30 mA typical program/erase current
— 25
µA
typical standby current
s
Flexible sector architecture
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
one 64 Kbyte sectors (byte mode)
— One 8 Kword, two 4 Kword, one 16 Kword, and
one 32 Kword sectors (word mode)
— Any combination of sectors can be erased
— Supports full chip erase
s
Top or bottom boot block configurations
available
s
Sector protection
— Hardware-based feature that disables/re-
enables program and erase operations in any
combination of sectors
— Sector protection/unprotection can be
implemented using standard PROM
programming equipment
— Temporary Sector Unprotect feature allows in-
system code changes in protected sectors
s
Embedded Algorithms
— Embedded Erase algorithm automatically
pre-programs and erases the chip or any
combination of designated sector
— Embedded Program algorithm automatically
programs and verifies data at specified address
s
Minimum 100,000 program/erase cycles
guaranteed
s
Compatible with JEDEC standards
— Pinout and software compatible with
single-power-supply flash
— Superior inadvertent write protection
s
Data Polling and Toggle Bits
— Provides a software method of detecting
program or erase cycle completion
s
Ready/Busy pin (RY/BY#)
— Provides a hardware method for detecting
program or erase cycle completion
s
Erase Suspend/Erase Resume
— Suspends an erase operation to read data from,
or program data to, a sector that is not being
erased, then resumes the erase operation
s
Hardware RESET# pin
— Hardware method of resetting the device to
reading array data
s
Tested to datasheet specifications at
temperature
s
Quality and reliability levels equivalent to
standard packaged components
Publication#
21235
Rev:
B
Amendment/0
Issue Date:
January 1998
S U P P L E M E N T
GENERAL DESCRIPTION
The Am29F100 in Known Good Die (KGD) form is a 1
Mbit, 5.0 Volt-only Flash memory. AMD defines KGD as
standard product in die form, tested for functionality
and speed. AMD KGD products have the same reli-
ability and quality as AMD products in packaged form.
Am29F100 Features
The Am29F100 is a 1 Mbit, 5.0 Volt-only Flash memory
organized as 131,072 bytes or 65,536 words. Word-
wide data appears on DQ0-DQ15; byte-wide data on
DQ0-DQ7. The device is designed to be programmed
in-system with the standard system 5.0 Volt V
CC
sup-
ply. A 12.0 volt V
PP
is not required for program or erase
operations. The device can also be programmed or
erased in standard EPROM programmers.
To eliminate bus contention the device has separate
chip enable (CE#), write enable (WE#) and output en-
able (OE#) controls.
The device requires only a
single 5.0 volt power sup-
ply
for both read and write functions. Internally gener-
ated and regulated voltages are provided for the
program and erase operations.
The device is entirely command set compatible with the
JEDEC single-power-supply Flash standard.
Com-
mands are written to the command register using stan-
dard microprocessor write timings. Register contents
serve as input to an internal state machine that controls
the erase and programming circuitry. Write cycles also
internally latch addresses and data needed for the pro-
gramming and erase operations. Reading data out of
the device is similar to reading from other Flash or
EPROM devices.
Device programming occurs by executing the program
command sequence. This invokes the
Embedded
Program
algorithm—an internal algorithm that auto-
matically times the program pulse widths and verifies
proper cell margin.
Device erasure occurs by executing the erase com-
mand sequence. This invokes the
Embedded Erase
algorithm—an internal algorithm that automatically pre-
programs the array (if it is not already programmed) be-
fore executing the erase operation. During erase, the
device automatically times the erase pulse widths and
verifies proper cell margin.
The host system can detect whether a program or
erase operation is complete by observing the RY/BY#
pin, or by reading the DQ7 (Data# Polling) and DQ6
(toggle)
status bits.
After a program or erase cycle
has been completed, the device is ready to read array
data or accept another command.
The
Erase Suspend
feature enables the system to put
erase on hold for any period of time to read data from,
or program data to, a sector that is not being erased.
The
sector erase architecture
allows memory sectors
to be erased and reprogrammed without affecting the
data contents of other sectors. The device is erased
when shipped from the factory.
The
hardware data protection
measures include a
low V
CC
detector automatically inhibits write operations
during power transitions. The
hardware sector pro-
tection
feature disables both program and erase oper-
ations in any combination of the sectors of memory,
and is implemented using standard EPROM program-
mers. The
temporary sector unprotect
feature allows
in-system changes to protected sectors.
The
hardware RESET# pin
terminates any operation
in progress and resets the internal state machine to
reading array data. The RESET# pin may be tied to the
system reset circuitry. A system reset would thus also
reset the device, enabling the system microprocessor
to read the boot-up firmware from the Flash memory.
The system can place the device into the
standby mode.
Power consumption is greatly reduced in this mode.
AMD’s Flash technology combines years of Flash
memory manufacturing experience to produce the
h i g h e st l e v e l s o f q u a l i ty, re l i a b il i ty, a n d c o s t
effectiveness. The device electrically erases all bits
within a sector simultaneously via Fowler-Nordheim
tunneling. The bytes are programmed one byte at a
time using the EPROM programming mechanism of
hot electron injection.
ELECTRICAL SPECIFICATIONS
Refer to the Am29F100 data sheet, document number
18926, for full electrical s pecifications on the
Am29F100.
2
Am29F100 Known Good Die
S U P P L E M E N T
ORDERING INFORMATION
Standard Products
AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is
formed by a combination of the following:
Am29F100
T
-120
DP
C
1
DIE REVISION
This number refers to the specific AMD manufacturing
process and product technology reflected in this
document. It is entered in the revision field of AMD
standard product nomenclature.
TEMPERATURE RANGE
C = Commercial (0°C to +70°C)
I = Industrial (–40°C to +85°C)
E = Extended (–55°C to +125°C)
PACKAGE TYPE AND
MINIMUM ORDER QUANTITY
DP = Waffle Pack
180 die per 5 tray stack
DG =
DT =
DW =
Gel-Pak
®
Die Tray
420 die per 6 tray stack
Surftape™ (Tape and Reel)
1600 per 7-inch reel
Gel-Pak
®
Wafer Tray (sawn wafer on frame)
Call AMD sales office for minimum order
quantity
SPEED OPTION
See Valid Combinations
BOOT CODE SECTOR ARCHITECTURE
T = Top sector
B = Bottom sector
DEVICE NUMBER/DESCRIPTION
Am29F100 Known Good Die
1 Megabit (128 K x 8-Bit/64K x 16-Bit) CMOS Flash Memory—Die Revision 1
5.0 Volt-only Program and Erase
Valid Combinations
Am29F100T-120
Am29F100B-120
DPC 1, DPI 1, DPE 1,
DGC 1, DGI 1, DGE 1,
DTC 1, DTI 1, DTE 1,
DWC 1, DWI 1, DWE 1
Valid Combinations
Valid Combinations list configurations planned to be sup-
ported in volume for this device. Consult the local AMD sales
office to confirm availability of specific valid combinations and
to check on newly released combinations.
Am29F100 Known Good Die
5
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