DATA SHEET
GaAs INTEGRATED CIRCUIT
µ
PG2008TK
L, S-BAND SPDT SWITCH
DESCRIPTION
The
µ
PG2008TK is a GaAs MMIC for L, S-band SPDT (Single Pole Double Throw) switch which were developed
for mobile phone and another L, S-band application.
This device can operate frequency from 0.5 to 2.5 GHz, having the low insertion loss and high isolation.
This device is housed in a 6-pin lead-less minimold package (1511). And this package is able to high-density
surface mounting.
FEATURES
• Switch control voltage
• Low insertion loss
: V
cont (H)
= 2.5 to 5.3 V (2.8 V TYP.)
: V
cont (L)
=
−0.2
to +0.2 V (0 V TYP.)
: L
INS1
= 0.40 dB TYP. @ f = 0.5 to 1.0 GHz, V
cont
= 2.8 V/0 V
: L
INS2
= 0.55 dB TYP. @ f = 2.0 GHz, V
cont
= 2.8 V/0 V
: L
INS3
= 0.60 dB TYP. @ f = 2.5 GHz, V
cont
= 2.8 V/0 V
• High isolation
• High-density surface mounting
: ISL1 = 25 dB TYP. @ f = 0.5 to 2.0 GHz, V
cont
= 2.8 V/0 V
: ISL2 = 25 dB TYP. @ f = 2.5 GHz, V
cont
= 2.8 V/0 V
: 6-pin lead-less minimold package (1.5
×
1.1
×
0.55 mm)
APPLICATIONS
• L-band digital cellular or cordless telephone
• PCS, W-LAN, WLL and Bluetooth
TM
etc.
ORDERING INFORMATION
Part Number
Package
6-pin lead-less minimold
(1511)
Marking
G2R
Supplying Form
•
Embossed tape 8 mm wide
•
Pin 1, 6 face the perforation side of the tape
•
Qty 5 kpcs/reel
µ
PG2008TK-E2
Remark
To order evaluation samples, contact your nearby sales office.
Part number for sample order:
µ
PG2008TK
Caution Observe precautions when handling because these devices are sensitive to electrostatic discharge.
The information in this document is subject to change without notice. Before using this document, please confirm that
this is the latest version.
Not all devices/types available in every country. Please check with local NEC Compound Semiconductor Devices
representative for availability and additional information.
Document No. PG10217EJ03V0DS (3rd edition)
Date Published June 2004 CP(K)
Printed in Japan
The mark
shows major revised points.
NEC Compound Semiconductor Devices, Ltd. 2002, 2004
µ
PG2008TK
PIN CONNECTIONS AND INTERNAL BLOCK DIAGRAM
(Top View)
1
2
3
6
5
4
1
2
3
(Top View)
6
5
4
6
5
4
(Bottom View)
1
2
3
Pin No.
1
Pin Name
OUTPUT1
GND
OUTPUT2
V
cont2
INPUT
V
cont1
TRUTH TABLE
V
cont1
Low
High
V
cont2
High
Low
INPUT−OUTPUT1
ON
OFF
INPUT−OUTPUT2
OFF
ON
ABSOLUTE MAXIMUM RATINGS (T
A
= +25°C, unless otherwise specified)
Parameter
Switch Control Voltage
Input Power
Power Dissipation
Operating Ambient Temperature
Storage Temperature
Symbol
V
cont
P
in
P
D
T
A
T
stg
Ratings
−6.0
to +6.0
+28
150
Note 2
Note 1
Notes 1.
V
cont1
-V
cont2
≤
6.0 V
2.
Mounted on double-sided copper-clad 50
×
50
×
1.6 mm epoxy glass PWB, T
A
= +85°C
RECOMMENDED OPERATING RANGE (T
A
= +25°C, unless otherwise specified)
Parameter
Switch Control Voltage (H)
Switch Control Voltage (L)
Symbol
V
cont (H)
V
cont (L)
MIN.
2.5
−0.2
TYP.
2.8
0
MAX.
5.3
0.2
Unit
V
V
G2R
2
3
4
5
6
Unit
V
dBm
mW
°C
°C
−45
to +85
−55
to +150
2
Data Sheet PG10217EJ03V0DS
µ
PG2008TK
ELECTRICAL CHARACTERISTICS
(T
A
= +25°C, V
cont
= 2.8 V/0 V, DC cut capacitors = 56 pF, unless otherwise specified)
Parameter
Insertion Loss1
Insertion Loss2
Insertion Loss3
Isolation1
Isolation2
Input Return Loss
Output Return Loss
1 dB Gain Compression
Input Power
Note
Symbol
L
INS1
L
INS2
L
INS3
ISL1
ISL2
RL
in
RL
out
P
in (1 dB)
Test Conditions
f = 0.5 to 1.0 GHz
f = 2.0 GHz
f = 2.5 GHz
f = 0.5 to 2.0 GHz
f = 2.5 GHz
f = 0.5 to 2.5 GHz
f = 0.5 to 2.5 GHz
f = 2.0 GHz
MIN.
−
−
−
22
20
13
13
+20.0
−
TYP.
0.40
0.55
0.60
25
25
20
20
+25.0
MAX.
0.70
0.80
0.85
−
−
−
−
−
Unit
dB
dB
dB
dB
dB
dB
dB
dBm
Switching Control Current
I
cont
0.5
10
µ
A
Note
P
in (1 dB)
is measured the input power level when the insertion loss increases more 1 dB than that of linear
range.
STANDARD CHARACTERISTICS FOR REFERENCE
(T
A
= +25°C, V
cont
= 2.8 V/0 V, DC cut capacitors = 56 pF, unless otherwise specified)
Parameter
0.1 dB Gain Compression
Input Power
Note
Symbol
P
in (0.1 dB)
Test Conditions
f = 2.0 GHz
MIN.
−
−
TYP.
+20.0
MAX.
−
−
Unit
dBm
Switching Control Speed
t
SW
50
ns
Note
P
in (0.1 dB)
is measured the input power level when the insertion loss increases more 0.1 dB than that of linear
range.
Caution This device is used it is necessary to use DC cut capacitors. The value of DC cut capacitors
should be chosen to accommodate the frequency of operation, bandwidth, switching speed and
the condition with actual board of your system. The range of recommended DC cut capacitor
value is less than 100 pF.
Data Sheet PG10217EJ03V0DS
3
µ
PG2008TK
EVALUATION CIRCUIT (V
cont
= 2.8 V/0 V, DC cut capacitors = 56 pF)
V
cont1
INPUT
V
cont2
56 pF
1 000 pF
6
5
4
1 000 pF
1
2
3
56 pF
56 pF
OUTPUT1
OUTPUT2
The application circuits and their parameters are for reference only and are not intended for use in actual design-ins.
4
Data Sheet PG10217EJ03V0DS
µ
PG2008TK
ILLUSTRATION OF THE TEST CIRCUIT ASSEMBLED ON EVALUATION BOARD
V
cont2
6pin L2MM SPDT SW
Vc1
OUTPUT2
OUT 1
C2
C
2
C
4
C1
INPUT
C1
IN
C
5
C3
G2R
C1
C
1
C2
OUT 2
OUTPUT1
Vc2
V
cont1
USING THE NEC EVALUATION BOARD
Symbol
C1, C2, C3
C4, C5
Values
56 pF
1 000 pF
Data Sheet PG10217EJ03V0DS
5
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