AP89341_15 datasheet, PDF - EEWORLD Datasheet

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AP89341_15: DescriptionIntegrated Circuits Inc; File Size352KB，24 Pages; ManufacturerAplus; Websitehttp://www.aplusinc.com.tw/

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AP89341_15 Overview

Integrated Circuits Inc

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Integrated Circuits Inc.

aP89341/170/085

PLUS MAKE YOUR PRODUCTION A-PLUS

VOICE OTP IC

aP89341

– 341sec

aP89170

– 170sec

aP89085

– 85sec

PLUS

INTEGRATED CIRCUITS INC.

Sales E-mail:

Address:

3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei,

Taiwan 115, R.O.C.

(115)台北市南港區成功路一段 32

號

樓之

10.

TEL:

886-2-2782-9266

FAX:

886-2-2782-9255

WEBSITE :

http: //www.aplusinc.com.tw

sales@aplusinc.com.tw

Support E-mail:

service@aplusinc.com.tw

Integrated Circuits Inc.

PIN DESCRIPTIONS

aP89341/170/085

S1 ~ S8

Input Trigger Pins:

- In Key Trigger Mode, S1 to S8 is used to trigger the first 32 out of the total 254 Voice Groups .

- In CPU Parallel Command Mode, S1 to S8 serve as Voice Group address inputs for 254 Voice

Groups with S1 as LSB and S8 as MSB.

- In CPU Serial Command Mode, S1 is Chip Select (SC) pin to initiate the command input. S2 is

the Serial Clock (SCK) pin which clocks the input command and data bits into the chip. S3 is the

Data In (DI) pin in which command and data bits are shifted input into the chip.

- In OTP Programming Mode, S1 to S8 are used as data I/O pins.

SBT

Input Trigger Pin:

- In Key Trigger Mode, this pin is trigger pin to trigger the playback of Voice Groups one by one

sequentially.

- In CPU Parallel Command Mode, this pin is used as address strobe to latch the Voice Group

address input at S1 to S8 and starts the voice playback.

- In OTP Programming Mode, this pin is used as PGM signal.

VDD and AVDD

Power Supply Pins: These two pins must be connected together to the positive power supply.

VSS and AVSS

Power Ground Pins: These two pins must be connected to the power ground.

M0 and M1

Operating Mode Setting Pins:

- M1=0, M0=0 set the chip into Key Trigger Mode

- M1=0, M0=1 set the chip into CPU Parallel Command Mode

- M1=1, M0=0 set the chip into CPU Serial Command Mode

- M1=1, M0=1 set the chip into OTP Programming Mode

VOUT1 and VOUT2

Digital PWM output pins which can drive speaker and buzzer directly for voice playback.

OSC

During voice playback, an external resistor is connect between this pin and the VDD pin to set the

sampling frequency. In OTP Programming Mode, this is the ACLK input signal.

VPP

During voice playback, this pin must be connected together with VDD to the positive power supply

voltage. In OTP Programming Mode, this pin is connected to a separate 6.5V power supply voltage

for EPROM programming.

OUT1, OUT2 and OUT3

- In Key Trigger Mode and CPU Parallel Command Mode, these pins are user programmable pins

for the STOP pulse, BUSY and LED signals.

- In CPU Serial Command Mode, OUT1, OUT2 and OUT3 are fixed as BUSY, POUT and FULL

status output which tell the status of the chip operation. POUT can be further configurable to

BUSYB, 8K, 4K, 2K, 1K, 16Hz, 1M and EMPTY (or FULLB).

- During OTP programming, OUT1 serves as OEB while OUT2 serves as SIO (serial data IO).

COUT

Analog 8-bit current mode D/A output for voice playback

RST

Chip reset in playback mode or DCLK pin in OTP programming mode.

Ver 5.0

Aug 23, 2010

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