Loadable PLD, CMOS, CPGA160, PGA-160
| Parameter Name | Attribute value |
| Maker | Altera (Intel) |
| Parts packaging code | PGA |
| package instruction | PGA, |
| Contacts | 160 |
| Reach Compliance Code | unknown |
| Other features | 452 FLIP FLOPS; 336 LOGIC ELEMENTS |
| JESD-30 code | S-CPGA-P160 |
| length | 39.624 mm |
| Dedicated input times | 4 |
| Number of I/O lines | 116 |
| Number of terminals | 160 |
| Maximum operating temperature | 85 °C |
| Minimum operating temperature | -40 °C |
| organize | 4 DEDICATED INPUTS, 116 I/O |
| Output function | REGISTERED |
| Package body material | CERAMIC, METAL-SEALED COFIRED |
| encapsulated code | PGA |
| Package shape | SQUARE |
| Package form | GRID ARRAY |
| Programmable logic type | LOADABLE PLD |
| Certification status | Not Qualified |
| Maximum seat height | 5.34 mm |
| Maximum supply voltage | 5.5 V |
| Minimum supply voltage | 4.5 V |
| Nominal supply voltage | 5 V |
| surface mount | NO |
| technology | CMOS |
| Temperature level | INDUSTRIAL |
| Terminal form | PIN/PEG |
| Terminal pitch | 2.54 mm |
| Terminal location | PERPENDICULAR |
| width | 39.624 mm |
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