D ts e t
aa h e
R c e t r lc r nc
o h se Ee to is
Ma u a t r dCo o e t
n fc u e
mp n n s
R c e tr b a d d c mp n ns ae
o h se rn e
o oet r
ma ua trd u ig ete dewaes
n fcue sn i r i/ fr
h
p rh s d f m te oiia s p l r
uc a e r
o h r n l u pi s
g
e
o R c e tr waes rce td f m
r o h se
fr e rae r
o
te oiia I. Al rce t n ae
h
r nl P
g
l e rai s r
o
d n wi tea p o a o teOC
o e t h p rv l f h
h
M.
P r aetse u igoiia fcoy
at r e td sn r n la tr
s
g
ts p o rmso R c e tr e eo e
e t rga
r o h se d v lp d
ts s lt n t g aa te p o u t
e t oui s o u rne
o
rd c
me t o e c e teOC d t s e t
es r x e d h
M aa h e.
Qu l yOv riw
ai
t
e ve
• IO- 0 1
S 90
•A 92 cr ct n
S 1 0 et ai
i
o
• Qu l e Ma ua trr Ls (
ai d
n fcues it QML MI- R -
) LP F
385
53
•C a sQ Mitr
ls
lay
i
•C a sVS a eL v l
ls
p c ee
• Qu l e S p l r Ls o D sr uos( L )
ai d u pi s it f it b tr QS D
e
i
•R c e trsacic l u pir oD A a d
o h se i
r ia s p l t L n
t
e
me t aln u t a dD A sa d r s
es lid sr n L tn ad .
y
R c e tr lcrnc , L i c mmi e t
o h se Ee t is L C s o
o
tdo
t
s p ligp o u t ta s t f c so r x e t-
u pyn rd cs h t ai y u tme e p ca
s
t n fr u lya daee u loto eoiial
i s o q ai n r q a t h s r n l
o
t
g
y
s p l db id sr ma ua trr.
u pi
e yn ut
y n fcues
T eoiia ma ua trr d ts e t c o a yn ti d c me t e e t tep r r n e
h r n l n fcue’ aa h e a c mp n ig hs o u n r cs h ef ma c
g
s
o
a ds e ic t n o teR c e tr n fcue v rino ti d vc . o h se Ee t n
n p c ai s f h o h se ma ua trd eso f hs e ie R c e tr lcr -
o
o
isg aa te tep r r n eo i s mio d co p o u t t teoiia OE s e ic -
c u rne s h ef ma c ft e c n u tr rd cs o h r n l M p c a
o
s
g
t n .T pc lv le aefr eee c p r o e o l. eti mii m o ma i m rt g
i s ‘y ia’ au s r o rfrn e up s s ny C r n nmu
o
a
r xmu ai s
n
ma b b s do p o u t h rceiain d sg , i lt n o s mpetsig
y e a e n rd c c aa tr t , e in smuai , r a l e t .
z o
o
n
© 2 1 R cetr l t n s LC Al i t R sre 0 1 2 1
0 3 ohs E cr i , L . lRg s eevd 7 1 0 3
e e oc
h
T l r m r, l s v iw wrcl . m
o e n oe p ae it w . e c o
a
e
s
o ec
FSTD16861 20-Bit Bus Switch with Level Shifting
May 2001
Revised April 2004
FSTD16861
20-Bit Bus Switch with Level Shifting
General Description
The Fairchild Switch FSTD16861 provides 20-bits of high-
speed CMOS TTL-compatible bus switching. The low On
Resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise. A diode to V
CC
has been
integrated into the circuit to allow for level shifting between
5V inputs and 3.3V outputs.
The device is organized as a 10-bit or 20-bit bus switch.
When OE
1
is LOW, the switch is ON and Port 1A is con-
nected to Port 1B. When OE
2
is LOW, Port 2A is connected
to Port 2B. When OE
X
is HIGH, a high impedance state
exists between the A and B Ports.
Features
s
4
Ω
switch connection between two ports.
s
Minimal propagation delay through the switch.
s
Low l
CC
.
s
Zero bounce in flow-through mode.
s
Control inputs compatible with TTL level.
s
TruTranslation
voltage translation from 5.0V inputs to
3.3V outputs
s
Power-off high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
Note 1:
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number
FSTD16861MTD
Package Number
MTD48
Package Description
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
TruTranslation is trademark of Fairchild Semiconductor Corporation.
© 2004 Fairchild Semiconductor Corporation
DS500421
www.fairchildsemi.com
FSTD16861
Connection Diagram
Logic Diagram
Pin Descriptions
Pin Name
OE
1
, OE
2
1A
n
, 2A
n
1B
n
, 2B
n
Description
Bus Switch Enables
Bus A
Bus B
Truth Table
Inputs
OE
1
L
L
H
H
OE
2
L
H
L
H
Inputs/Outputs
1A, 1B
1A
=
1B
1A
=
1B
Z
Z
2A, 2B
2A
=
2B
Z
2A
=
2B
Z
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
Z
=
High Impedance
www.fairchildsemi.com
2
FSTD16861
Absolute Maximum Ratings
(Note 2)
Supply Voltage (V
CC
)
DC Switch Voltage (V
S
) (Note 3)
DC Input Voltage (V
IN
) (Note 4)
DC Input Diode Current (l
IK
) V
IN
<
0V
DC Output Current (I
OUT
)
DC V
CC
/GND Current (I
CC
/I
GND
)
Storage Temperature Range (T
STG
)
−
0.5V to
+
7.0V
−
0.5V to
+
7.0V
−
0.5V to
+
7.0V
−
50 mA
128 mA
Recommended Operating
Conditions
(Note 5)
Power Supply Operating (V
CC)
Input Voltage (V
IN
)
Output Voltage (V
OUT
)
Input Rise and Fall Time (t
r
, t
f
)
Switch Control Input
Switch I/O
Free Air Operating Temperature (T
A
)
0 ns/V to 5 ns/V
0 ns/V to DC
-40
°
C to
+
85
°
C
4.5V to 5.5V
0V to 5.5V
0V to 5.5V
±
100 mA
−
65
°
C to
+
150
°
C
Note 2:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 3:
V
S
is the voltage observed/applied at either the A or B Ports across
the switch.
Note 4:
The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 5:
Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
V
CC
Symbol
V
IK
V
IH
V
IL
V
OH
I
I
I
OZ
R
ON
Parameter
Clamp Diode Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level
Input Leakage Current
OFF-STATE Leakage Current
Switch On Resistance
(Note 7)
I
CC
Quiescent Supply Current
5.5
10
∆
I
CC
Increase in I
CC
per Input
5.5
2.5
µA
mA
(V)
4.5
4.5-5.5
4.5-5.5
4.5-5.5
5.5
0
5.5
4.5
4.5
4.5
4
4
35
See Figure 3
±1.0
10
±1.0
7
7
50
1.5
2.0
0.8
Min
T
A
= −40 °C
to
+85 °C
Typ
(Note 6)
Max
−1.2
Units
V
V
V
V
µA
µA
µA
Ω
Ω
Ω
mA
0
≤
V
IN
≤
5.5V
V
IN
=
5.5V
0
≤
A, B
≤
V
CC
V
IN
=
0V, I
IN
=
64 mA
V
IN
=
0V, I
IN
=
30 mA
V
IN
=
2.4V, I
IN
=
15 mA
OE
1
=
OE
2
=
GND
V
IN
=
V
CC
or GND, I
OUT
=
0
OE
1
=
OE
2
=
V
CC
V
IN
=
V
CC
or GND, I
OUT
=
0
One Input at 3.4V
Other Inputs at V
CC
or GND
Note 6:
Typical values are at V
CC
=
5.0V and T
A
= +25°C
Note 7:
Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the
voltages on the two (A or B) pins.
Conditions
I
IN
= −18
mA
3
www.fairchildsemi.com
FSTD16861
AC Electrical Characteristics
T
A
= −40 °C
to
+85 °C,
Symbol
Parameter
C
L
=
50pF, RU
=
RD
=
500Ω
V
CC
=
4.5 – 5.5V
Min
t
PHL
, t
PLH
t
PZH
, t
PZL
t
PHZ
, t
PLZ
Propagation Delay Bus-to-Bus (Note 8)
Output Enable Time
Output Disable Time
1.0
1.0
Max
0.25
6.0
7.0
ns
ns
ns
V
I
=
OPEN
V
I
=
7V for t
PZL
V
I
=
OPEN for t
PZH
V
I
=
7V for t
PLZ
V
I
=
OPEN for t
PHZ
Figures
1, 2
Figures
1, 2
Figures
1, 2
Units
Conditions
Figure
Number
Note 8:
This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
Resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
C
IN
C
I/O
(Note 9)
Parameter
Typ
3
6
Max
Units
pF
pF
Conditions
V
CC
=
5.0V, V
IN
=
0V
V
CC
, OE
=
5.0V, V
IN
=
0V
Control Pin Input Capacitance
Input/Output Capacitance “OFF State”
Note 9:
T
A
= +25°C,
f
=
1 Mhz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note:
Input driven by 50Ω source terminated in 50Ω
Note:
C
L
includes load and stray capacitance
Note:
Input PRR
=
1.0 MHz, t
W
=
500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
www.fairchildsemi.com
4
京公网安备 11010802033920号
EEWORLD
