CAT28C17ANA-20 datasheet, PDF - EEWORLD Datasheet

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CAT28C17ANA-20: DescriptionEEPROM, 2KX8, 200ns, Parallel, CMOS, PQCC32, PLASTIC, LCC-32; Categorystorage storage; File Size508KB，10 Pages; ManufacturerCatalyst; Websitehttp://www.catalyst-semiconductor.com/

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CAT28C17ANA-20 Overview

EEPROM, 2KX8, 200ns, Parallel, CMOS, PQCC32, PLASTIC, LCC-32

CAT28C17ANA-20 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Catalyst
Parts packaging code	QFJ
package instruction	QCCJ, LDCC32,.5X.6
Contacts	32
Reach Compliance Code	unknown
ECCN code	EAR99
Maximum access time	200 ns
command user interface	NO
Data polling	YES
Durability	10000 Write/Erase Cycles
JESD-30 code	R-PQCC-J32
JESD-609 code	e0
length	13.97 mm
memory density	16384 bit
Memory IC Type	EEPROM
memory width	8
Humidity sensitivity level	3
Number of functions	1
Number of terminals	32
word count	2048 words
character code	2000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	105 °C
Minimum operating temperature	-40 °C
organize	2KX8
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC32,.5X.6
Package shape	RECTANGULAR
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	240
power supply	5 V
Programming voltage	5 V
Certification status	Not Qualified
ready/busy	YES
Maximum seat height	3.55 mm
Maximum standby current	0.0001 A
Maximum slew rate	0.035 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
switch bit	NO
width	11.43 mm
Maximum write cycle time (tWC)	10 ms

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CAT28C17A

16K-Bit CMOS PARALLEL EEPROM

FEATURES

■

Fast Read Access Times: 200 ns

■

Low Power CMOS Dissipation:

■

End of Write Detection:

GEN

ALO

–Active: 25 mA Max.

–Standby: 100

A Max.

■

Simple Write Operation:

–DATA Polling

DATA

–RDY/BSY Pin

BSY

■

Hardware Write Protection

■

CMOS and TTL Compatible I/O

■

10,000 Program/Erase Cycles

■

10 Year Data Retention

■

Commercial,Industrial and Automotive

–On-Chip Address and Data Latches

–Self-Timed Write Cycle with Auto-Clear

■

Fast Write Cycle Time: 10ms Max

Temperature Ranges

DESCRIPTION

The CAT28C17A is a fast, low power, 5V-only CMOS

parallel EEPROM organized as 2K x 8-bits. It requires

a simple interface for in-system programming. On-chip

address and data latches, self-timed write cycle with

auto-clear and V

power up/down write protection

eliminate additional timing and protection hardware.

DATA

Polling and a RDY/BSY pin signal the start and

end of the self-timed write cycle. Additionally, the

CAT28C17A features hardware write protection.

The CAT28C17A is manufactured using Catalyst’s ad-

vanced CMOS floating gate technology. It is designed to

endure 10,000 program/erase cycles and has a data

retention of 10 years. The device is available in JEDEC

approved 28-pin DIP and SOIC or 32-pin PLCC pack-

ages.

BLOCK DIAGRAM

A4–A10

ADDR. BUFFER

& LATCHES

INADVERTENT

WRITE

PROTECTION

ROW

DECODER

2,048 x 8

EEPROM

ARRAY

VCC

HIGH VOLTAGE

GENERATOR

CONTROL

LOGIC

I/O BUFFERS

TIMER

DATA POLLING

& RDY/BUSY

I/O0–I/O7

A0–A3

ADDR. BUFFER

& LATCHES

COLUMN

DECODER

RDY/BUSY

Characteristics subject to change without notice

Doc. No. 1075, Rev. B

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