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IS62WV25616CLL-70B2

Description
Standard SRAM, 256KX16, 70ns, CMOS, PBGA48, 6 X 8 MM, MINI, BGA-48
Categorystorage    storage   
File Size72KB,13 Pages
ManufacturerIntegrated Silicon Solution ( ISSI )
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IS62WV25616CLL-70B2 Overview

Standard SRAM, 256KX16, 70ns, CMOS, PBGA48, 6 X 8 MM, MINI, BGA-48

IS62WV25616CLL-70B2 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerIntegrated Silicon Solution ( ISSI )
Parts packaging codeBGA
package instruction6 X 8 MM, MINI, BGA-48
Contacts48
Reach Compliance Codeunknown
ECCN code3A991.B.2.A
Maximum access time70 ns
JESD-30 codeR-PBGA-B48
JESD-609 codee0
length8 mm
memory density4194304 bit
Memory IC TypeSTANDARD SRAM
memory width16
Number of functions1
Number of terminals48
word count262144 words
character code256000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize256KX16
Package body materialPLASTIC/EPOXY
encapsulated codeLFBGA
Package shapeRECTANGULAR
Package formGRID ARRAY, LOW PROFILE, FINE PITCH
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum seat height1.35 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formBALL
Terminal pitch0.75 mm
Terminal locationBOTTOM
width6 mm

IS62WV25616CLL-70B2 Preview

IS62WV25616CLL
256K x 16 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC SRAM
FEATURES
• High-speed access time: 55ns, 70ns
• CMOS low power operation
– 36 mW (typical) operating
– 9 µW (typical) CMOS standby
• TTL compatible interface levels
• Single power supply
– 2.5V--3.6V V
DD
(62WV25616CLL)
• Fully static operation: no clock or refresh
required
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
• 2CS Option Available
ISSI
DESCRIPTION
®
PRELIMINARY INFORMATION
SEPTEMBER 2002
The
ISSI
IS62WV25616CLL are high-speed, low power, 4M
bit SRAMs organized as 256K words by 16 bits. It is
fabricated using
ISSI
's high-performance CMOS technology.
This highly reliable process coupled with innovative circuit
design techniques, yields high-performance and low power
consumption devices.
When
CS1
is HIGH (deselected) or when CS2 is LOW
(deselected) or when
CS1
is LOW, CS2 is HIGH and both
LB
and
UB
are HIGH, the device assumes a standby mode
at which the power dissipation can be reduced down with
CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE)
controls both writing and reading of the memory. A
data byte allows Upper Byte
(UB)
and Lower Byte (LB)
access.
The IS62WV25616CLL are packged in the JEDEC standard
48-pin mini BGA (6mm x 8mm). 48-pin mini BGA is
available both in 1CS and 2CS options.
FUNCTIONAL BLOCK DIAGRAM
A0-A17
DECODER
256K x 16
MEMORY ARRAY
V
DD
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CS2
CS1
OE
WE
UB
LB
CONTROL
CIRCUIT
Copyright © 2002 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
PRELIMINARY INFORMATION, Rev. 00A
09/03/02
1
IS62WV25616CLL
PIN CONFIGURATIONS
48- ball mini BGA (6mm x 8mm)
(Package Code B)
1
2
3
4
5
6
ISSI
48-ball mini BGA (6mm x 8mm)
2 CS Option (Package Code B2)
1
2
3
4
5
6
®
A
B
C
D
E
F
G
H
LB
I/O
8
I/O
9
GND
V
DD
I/O
14
I/O
15
NC
OE
UB
I/O
10
I/O
11
I/O
12
I/O
13
NC
A8
A0
A3
A5
A17
NC
A14
A12
A9
A1
A4
A6
A7
A16
A15
A13
A10
A2
CSI
I/O
1
I/O
3
I/O
4
I/O
5
WE
A11
NC
I/O
0
I/O
2
V
DD
GND
I/O
6
I/O
7
NC
A
B
C
D
E
F
G
H
LB
I/O
8
I/O
9
GND
V
DD
I/O
14
I/O
15
NC
OE
UB
I/O
10
I/O
11
I/O
12
I/O
13
NC
A8
A0
A3
A5
A17
NC
A14
A12
A9
A1
A4
A6
A7
A16
A15
A13
A10
A2
CS1
I/O
1
I/O
3
I/O
4
I/O
5
WE
A11
CS2
I/O
0
I/O
2
V
DD
GND
I/O
6
I/O
7
NC
PIN DESCRIPTIONS
A0-A17
I/O0-I/O15
CS1,
CS2
OE
WE
LB
UB
NC
V
DD
GND
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Output Enable Input
Write Enable Input
Lower-byte Control (I/O0-I/O7)
Upper-byte Control (I/O8-I/O15)
No Connection
Power
Ground
2
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
PRELIMINARY INFORMATION Rev. 00A
09/03/02
IS62WV25616CLL
TRUTH TABLE
Mode
Not Selected
WE
X
X
X
H
H
H
H
H
L
L
L
CS1
H
X
X
L
L
L
L
L
L
L
L
CS2
X
L
X
H
H
H
H
H
H
H
H
OE
X
X
X
H
H
L
L
L
X
X
X
LB
X
X
H
L
X
L
H
L
L
H
L
UB
X
X
H
X
L
H
L
L
H
L
L
I/O PIN
I/O0-I/O7
I/O8-I/O15
High-Z
High-Z
High-Z
High-Z
High-Z
D
OUT
High-Z
D
OUT
D
IN
High-Z
D
IN
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
D
OUT
D
OUT
High-Z
D
IN
D
IN
ISSI
Vdd Current
I
SB
1
, I
SB
2
I
SB
1
, I
SB
2
I
SB
1
, I
SB
2
I
CC
I
CC
I
CC
®
Output Disabled
Read
Write
I
CC
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
V
DD
T
STG
P
T
Parameter
Terminal Voltage with Respect to GND
V
DD
Related to GND
Storage Temperature
Power Dissipation
Value
–0.3 to V
DD
+0.5
–0.2 to +4.2
–55 to +125
0.6
Unit
V
V
°C
W
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect reliability.
Operation Range (V
DD
)
Range
Commercial
Industrial
Ambient Temperature
0
o
C to +70
o
C
-40
o
C to +85
o
C
V
DD
2.5V - 3.6V
2.5V - 3.6V
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
PRELIMINARY INFORMATION Rev. 00A
09/03/02
3
IS62WV25616CLL
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol Parameter
V
OH
V
OL
V
IH
V
IL(1)
I
LI
I
LO
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Leakage
Output Leakage
GND
V
IN
V
DD
GND
V
OUT
V
DD
, Outputs Disabled
Test Conditions
I
OH
= -1 mA
I
OL
= 2.1 mA
Vdd
2.5-3.6V
2.5-3.6V
2.5-3.6V
2.5-3.6V
Min.
2.2
2.2
–0.2
–1
–1
ISSI
Max.
0.4
V
DD
+ 0.3
0.6
1
1
Unit
V
V
V
V
µA
µA
®
Notes:
1. V
IL
(min.) = –1.0V for pulse width less than 10 ns.
CAPACITANCE
(1)
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
8
10
Unit
pF
pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
IS62WV25616CLL, POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
I
CC
I
CC
1
I
SB
1
Parameter
Vdd Dynamic Operating
Supply Current
Operating Supply
Current
TTL Standby Current
(TTL Inputs)
Test Conditions
V
DD
= Max.,
Com.
I
OUT
= 0 mA, f = f
MAX
Ind.
V
DD
= Max.,
Com.
I
OUT
= 0 mA, f = 0
Ind.
V
DD
= Max.,
Com.
V
IN
= V
IH
or V
IL
Ind.
CS1
= V
IH
, CS2 = V
IL
,
f = 1 MH
Z
OR
V
DD
= Max., V
IN
= V
IH
or V
IL
CS1
= V
IL
, f = 0,
UB
= V
IH
,
LB
= V
IH
V
DD
= Max.,
Com.
CS1
V
DD
– 0.2V,
Ind.
CS2
0.2V,
V
IN
V
DD
– 0.2V, or
V
IN
0.2V, f = 0
OR
V
DD
= Max.,
CS1
= V
IL
, CS2=V
IH
V
IN
0.2V, f = 0;
UB
/
LB
= V
DD
– 0.2V
Max.
55
50
55
2
3
0.6
0.8
Max.
70
45
50
2
3
0.6
0.8
Unit
mA
mA
mA
ULB Control
I
SB
2
CMOS Standby
Current (CMOS Inputs)
10
10
10
10
µA
ULB Control
4
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
PRELIMINARY INFORMATION Rev. 00A
09/03/02
IS62WV25616CLL
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
IS62WV25616CLL
(Unit)
0.4 to V
DD
-0.3V
5ns
V
REF
See Figures 1 and 2
ISSI
®
AC TEST LOADS
R1
VTM
VTM
R1
OUTPUT
OUTPUT
30 pF
Including
jig and
scope
R2
5 pF
Including
jig and
scope
R2
Figure 1
Figure 2
2.5V - 3.6V
R1(Ω)
Ω)
R2(Ω)
Ω)
V
REF
V
TM
3070
3150
1.5V
2.8V
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
PRELIMINARY INFORMATION Rev. 00A
09/03/02
5

IS62WV25616CLL-70B2 Related Products

IS62WV25616CLL-70B2 IS62WV25616CLL-70B
Description Standard SRAM, 256KX16, 70ns, CMOS, PBGA48, 6 X 8 MM, MINI, BGA-48 Standard SRAM, 256KX16, 70ns, CMOS, PBGA48, 6 X 8 MM, MINI, BGA-48
Is it Rohs certified? incompatible incompatible
Maker Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI )
Parts packaging code BGA BGA
package instruction 6 X 8 MM, MINI, BGA-48 6 X 8 MM, MINI, BGA-48
Contacts 48 48
Reach Compliance Code unknown unknown
ECCN code 3A991.B.2.A 3A991.B.2.A
Maximum access time 70 ns 70 ns
JESD-30 code R-PBGA-B48 R-PBGA-B48
JESD-609 code e0 e0
length 8 mm 8 mm
memory density 4194304 bit 4194304 bit
Memory IC Type STANDARD SRAM STANDARD SRAM
memory width 16 16
Number of functions 1 1
Number of terminals 48 48
word count 262144 words 262144 words
character code 256000 256000
Operating mode ASYNCHRONOUS ASYNCHRONOUS
Maximum operating temperature 70 °C 70 °C
organize 256KX16 256KX16
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code LFBGA LFBGA
Package shape RECTANGULAR RECTANGULAR
Package form GRID ARRAY, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE, FINE PITCH
Parallel/Serial PARALLEL PARALLEL
Certification status Not Qualified Not Qualified
Maximum seat height 1.35 mm 1.35 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V
Minimum supply voltage (Vsup) 2.5 V 2.5 V
surface mount YES YES
technology CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form BALL BALL
Terminal pitch 0.75 mm 0.75 mm
Terminal location BOTTOM BOTTOM
width 6 mm 6 mm

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