IDT71321LA55L52B datasheet, PDF

IDT71321LA55L52B: DescriptionMulti-Port SRAM, 2KX8, 55ns, CMOS, CQCC52, LCC-52; Categorystorage storage; File Size477KB，15 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT71321LA55L52B Overview

Multi-Port SRAM, 2KX8, 55ns, CMOS, CQCC52, LCC-52

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	LCC
package instruction	LCC-52
Contacts	52
Reach Compliance Code	not_compliant
ECCN code	3A001.A.2.C
Maximum access time	55 ns
Other features	INTERRUPT FLAG; AUTOMATIC POWER-DOWN
I/O type	COMMON
JESD-30 code	S-CQCC-N52
JESD-609 code	e0
length	19.05 mm
memory density	16384 bit
Memory IC Type	MULTI-PORT SRAM
memory width	8
Number of functions	1
Number of ports	2
Number of terminals	52
word count	2048 words
character code	2000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	2KX8
Output characteristics	3-STATE
Exportable	YES
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QCCN
Encapsulate equivalent code	LCC52,.75SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
Filter level	38535Q/M;38534H;883B
Maximum seat height	2.2098 mm
Maximum standby current	0.004 A
Minimum standby current	2 V
Maximum slew rate	0.185 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	19.05 mm

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