DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ
PA2701GR
SWITCHING
N-CHANNEL POWER MOS FET
DESCRIPTION
The
µ
PA2701GR is N-Channel MOS Field Effect Transistor
designed for DC/DC converters and power management
applications of notebook computers.
PACKAGE DRAWING (Unit: mm)
8
5
1, 2, 3
; Source
4
; Gate
5, 6, 7, 8 ; Drain
FEATURES
•
Low on-state resistance
R
DS(on)1
= 7.5 mΩ MAX. (V
GS
= 10 V, I
D
= 7.0 A)
R
DS(on)2
= 11.6 mΩ MAX. (V
GS
= 4.5 V, I
D
= 7.0 A)
•
Low C
iss
: C
iss
= 1200 pF TYP. (V
DS
= 10 V, V
GS
= 0 V)
•
Small and surface mount package (Power SOP8)
1
4
5.37 MAX.
+0.10
–0.05
6.0 ±0.3
4.4
0.8
1.8 MAX.
1.44
0.05 MIN.
ORDERING INFORMATION
PART NUMBER
PACKAGE
Power SOP8
0.15
0.5 ±0.2
0.10
1.27 0.78 MAX.
0.40
+0.10
–0.05
µ
PA2701GR
0.12 M
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C, All terminals are connected.)
Drain to Source Voltage (V
GS
= 0 V)
Gate to Source Voltage (V
DS
= 0 V)
Drain Current (DC)
Drain Current (pulse)
Note1
Note2
V
DSS
V
GSS
I
D(DC)
I
D(pulse)
P
T
T
ch
T
stg
30
±20
±14
±56
2.0
150
–55 to +150
14
19.6
V
V
A
A
W
°C
°C
A
mJ
Gate
Protection
Diode
Gate
Body
Diode
EQUIVALENT CIRCUIT
Drain
Total Power Dissipation (T
A
= 25°C)
Channel Temperature
Storage Temperature
Single Avalanche Current
Single Avalanche Energy
Note3
Note3
I
AS
E
AS
Source
Notes 1.
PW
≤
10
µ
s, Duty Cycle
≤
1%
2
2.
Mounted on ceramic substrate of 1200 mm x 2.2 mm
3.
Starting T
ch
= 25°C, V
DD
= 15 V, R
G
= 25
Ω,
L = 100
µ
H, V
GS
= 20
→
0 V
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is extemally required if a voltage exceeding
the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. G15714EJ2V0DS00 (2nd edition)
Date Published May 2002 NS CP(K)
Printed in Japan
The mark
!
shows major revised points.
©
2002
µ
PA2701GR
ELECTRICAL CHARACTERISTICS (T
A
= 25°C, All terminals are connected.)
CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate Cut-off Voltage
Forward Transfer Admittance
Drain to Source On-state Resistance
SYMBOL
I
DSS
I
GSS
V
GS(off)
| y
fs
|
R
DS(on)1
R
DS(on)2
R
DS(on)3
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
G
Q
GS
Q
GD
V
F(S-D)
t
rr
Q
rr
V
DD
= 15 V
V
GS
= 5 V
I
D
= 14 A
I
F
= 14 A, V
GS
= 0 V
I
F
= 14 A, V
GS
= 0 V
di/dt = 100 A/
µ
s
TEST CONDITIONS
V
DS
= 30 V, V
GS
= 0 V
V
GS
=
±
20 V, V
DS
= 0 V
V
DS
= 10 V, I
D
= 1 mA
V
DS
= 10 V, I
D
= 7.0 A
V
GS
= 10 V, I
D
= 7.0 A
V
GS
= 4.5 V, I
D
= 7.0 A
V
GS
= 4.0 V, I
D
= 7.0 A
V
DS
= 10 V
V
GS
= 0 V
f = 1 MHz
V
DD
= 15 V, I
D
= 7.0 A
V
GS
= 10 V
R
G
= 10
Ω
1.5
7
2.0
14
6.2
8.7
10.3
1200
500
160
10
13
44
11
12
4
6
0.8
32
27
1.2
7.5
11.6
13.7
MIN.
TYP.
MAX.
10
±10
2.5
UNIT
µ
A
µ
A
V
S
mΩ
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
R
G
= 25
Ω
PG.
V
GS
= 20
→
0 V
50
Ω
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L
V
DD
PG.
R
G
V
GS
R
L
V
DD
V
DS
90%
90%
10%
10%
V
GS
Wave Form
0
10%
V
GS
90%
BV
DSS
I
AS
I
D
V
DD
V
DS
V
GS
0
V
DS
V
DS
Wave Form
0
t
d(on)
t
on
τ
τ
= 1
µ
s
Duty Cycle
≤
1%
t
r
t
d(off)
t
off
t
f
Starting T
ch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
I
G
= 2 mA
PG.
50
Ω
R
L
V
DD
2
Data Sheet G15714EJ2V0DS
µ
PA2701GR
TYPICAL CHARACTERISTICS (T
A
= 25°C)
!
120
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
2.8
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
dT - Percentage of Rated Power - %
P
T
- Total Power Dissipation - W
100
80
60
40
20
2.4
2.0
1.6
1.2
0.8
0.4
0
0
20
40
60
80
Mounted on ceramic
substrate of
1200 mm
2
×2.2
mm
0
20
40
60
80
100
120 140
160
100 120 140
160
T
A
- Ambient Temperature -
˚C
T
A
- Ambient Temperature - ˚C
FORWARD BIAS SAFE OPERATING AREA
100
d
ite )
Lim V
)
10
on
S(
=
R
D GS
(V
I
D(pulse) =
56 A
PW
I
D(DC) =
14 A
10
Di
ss
ip
=
1
m
I
D
- Drain Current - A
10
10
Po
we
r
s
m
s
0
m
Remark
Mounted on ceramicsubstrate of
1200 mm x 2.2 mm
2
s
1
at
io
n
Li
m
ite
d
0.1
T
A
= 25˚C
Single Pulse
0.01
0.01
0.1
1
10
100
V
DS
- Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
100
r
th(t)
- Transient Thermal Resistance - ˚C/ W
R
th(ch-A)
= 62.5˚C/W
10
1
Mounted on ceramic substrate of
1200 mm
2
×
2.2 mm
Single Pulse
Channel to Ambient
0.1
0.001
0.01
0.1
1
10
PW - Pulse Width - s
100
1000
Data Sheet G15714EJ2V0DS
3
µ
PA2701GR
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
80
70
FORWARD TRANSFER CHARACTERISTICS
100
Pulsed
I
D
- Drain Current - A
I
D
- Drain Current - A
10
60
50
40
30
20
10
V
GS
= 10 V
4.5 V
1
T
A
= 150˚C
75˚C
25˚C
−25˚C
4.0 V
0.1
0.01
0
1
2
3
V
DS
= 10 V
4
5
0
0
Pulsed
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
V
DS
- Drain to Source Voltage - V
V
GS
- Gate to Source Voltage - V
| y
fs
| - Forward Transfer Admittance - S
100
V
DS
= 10 V
Pulsed
R
DS(on)
- Drain to Source On-state Resistance - mΩ
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
20
Pulsed
18
16
14
12
10
8
6
4
2
0
0
2
4
6
8
10
12
14
16
18
20
I
D
= 7.0 A
10
1
T
A
= 150˚C
75˚C
25˚C
−25˚C
0.1
0.01
0.1
1
10
100
I
D
- Drain Current - A
V
GS
- Gate to Source Voltage - V
R
DS(on)
- Drain to Source On-state Resistance - mΩ
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
30
Pulsed
15
V
GS
= 4.0 V
10
4.5 V
5
10 V
3
GATE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
V
DS
= 10 V
I
D
= 1 mA
V
GS(off)
- Gate Cut-off Voltage - V
10
100
2
1
0
0.1
1
0
−50 −25
0
25
50
75
100 125 150
I
D
- Drain Current - A
T
ch
- Channel Temperature - ˚C
4
Data Sheet G15714EJ2V0DS
µ
PA2701GR
R
DS(on)
- Drain to Source On-state Resistance - mΩ
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
20
Pulsed
15
V
GS
= 4 V
4.5 V
10
10 V
5
100
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
Pulsed
V
GS
= 0 V
I
SD
- Diode Forward Current - A
10
1
0.1
0
−50 −25
0.01
0
25
50
75
100 125 150 175
0
0.2
0.4
0.6
0.8
1.0
1.2
T
ch
- Channel Temperature - ˚C
V
SD
- Source to Drain Voltage - V
CAPACITANCE vs.
DRAIN TO SOURCE VOLTAGE
10000
100
SWITCHING CHARACTERISTICS
t
d(on)
, t
r
, t
d(off)
, t
f
- Switching Time - ns
C
iss
, C
oss
, C
rss
- Capacitance - pF
t
d(off)
t
f
t
r
10
t
d(on)
1000
C
iss
C
oss
100
C
rss
10
0.1
V
GS
= 0 V
f = 1 MHz
1
10
100
V
DD
= 15 V
V
GS
= 10 V
R
G
= 10
Ω
1
0.1
1
10
100
V
DS
- Drain to Source Voltage - V
I
D
- Drain Current - A
REVERSE RECOVERY TIME vs.
DRAIN CURRENT
1000
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
40
V
DS
- Drain to Source Voltage - V
t
rr
- Reverse Recovery Time - ns
35
30
25
20
15
10
5
0
0
2
4
6
8
10
12
14
Q
G
- Gate Charge - nC
V
DS
I
D
= 14 A
16
18
V
DD
= 24 V
15 V
6V
V
GS
7
6
5
4
3
2
1
0
20
100
10
1
0.1
1
10
100
I
F
- Drain Current - A
V
GS
- Gate to Source Voltage - V
di/dt = 100 A/
µ
s
V
GS
= 0 V
8
Data Sheet G15714EJ2V0DS
5
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