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EN5395QI-T

Description
Switching Regulator/Controller, Voltage-mode, 9A, 5000kHz Switching Freq-Max, PQCC58
CategoryPower/power management    The power supply circuit   
File Size580KB,19 Pages
ManufacturerIntel
Websitehttp://www.intel.com/
Environmental Compliance
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EN5395QI-T Overview

Switching Regulator/Controller, Voltage-mode, 9A, 5000kHz Switching Freq-Max, PQCC58

EN5395QI-T Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerIntel
package instructionQCCN, LCC58,.39X.47,25
Reach Compliance Codecompliant
control modeVOLTAGE-MODE
JESD-30 codeR-PQCC-N58
Humidity sensitivity level3
Number of terminals58
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Maximum output current9 A
Package body materialPLASTIC/EPOXY
encapsulated codeQCCN
Encapsulate equivalent codeLCC58,.39X.47,25
Package shapeRECTANGULAR
Package formCHIP CARRIER
Certification statusNot Qualified
surface mountYES
Maximum switching frequency5000 kHz
Temperature levelINDUSTRIAL
Terminal formNO LEAD
Terminal pitch0.635 mm
Terminal locationQUAD

EN5395QI-T Preview

EN5395QI
ENPIRION
Description
9A Synchronous Buck PWM DC-DC
Converter with Integrated Inductor
3-Pin VID Output Voltage Select
August 2008
RoHS Compliant
Features
The EN5395QI is a Power Supply on a Chip
(PwrSoC) DC-DC converter. It is specifically
designed to meet the precise voltage and fast
transient requirements of present and future
high-performance, low-power processor, DSP,
FPGA, ASIC, memory boards, and system level
applications in a distributed power architecture.
Advanced circuit techniques, ultra high switching
frequency,
and
innovative,
high-density,
integrated circuit and proprietary inductor
technology deliver high-quality, ultra compact,
non-isolated DC-DC conversion. Operating this
converter requires as few as five external
components that include small value input and
output ceramic capacitors and a soft-start
capacitor.
The Enpirion solution significantly helps in
system design and productivity by offering greatly
simplified
board
design,
layout
and
manufacturing requirements. In addition, a
reduction in the number of vendors required for
the complete power solution helps to enable an
overall system cost savings.
10mm
12mm
Applications
Area constrained applications
Noise sensitive applications
Low voltage, distributed power architectures
with 2.5V, 3.3V or 5V rails
Computing
Enterprise Storage
Broadband, networking, LAN/WAN, optical
DSL, STB, DVR, DTV, Industrial PC
Integrated Inductor Technology:
Integrated
Inductor, MOSFETS, Controller in a 10 x 12 x
1.85mm package
Low Part Count: only 5 MLC Capacitors.
Up to 30W continuous output power.
Low output impedance optimized for
90 nm
Master/slave configuration for paralleling.
5MHz operating frequency.
High efficiency, up to 93%.
Wide input voltage range of 2.375V to 5.5V.
3-Pin VID output voltage select to choose one
of 7 pre-programmed output voltages.
Output Enable pin and Power OK signal.
Programmable soft-start time.
Adjustable over-current protection.
Thermal shutdown, short circuit, over-voltage
and under-voltage protection.
RoHS compliant, MSL level 3, 260C reflow.
Typical Application Circuit
V
IN
2 x 47µF
POK
SS
VSENSE
VOUT
PVIN
AVIN
VS0
VS1
VS2
VID Output
Voltage Select
V
OUT
2 x 47µF
Ordering Information
Part Number
EN5395QI-T
EN5395QI-E
Temp Rating (°C)
Package
-40 to +85
58-pin QFN T&R
QFN Evaluation Board
15nF
AGND
PGND
Figure 1. Simple Layout.
©Enpirion
2008 all rights reserved, E&OE
1
www.enpirion.com
August 2008
EN5395QI
Pin Configuration
Below is a top view diagram of the EN5395Q package.
NOTE: NC pins are not to be electrically connected to each other or to any external signal, ground, or voltage.
However, they must be soldered to the PCB. Failure to follow this guideline may result in part malfunction or
damage.
Figure 2. Pin Diagram, top view.
©Enpirion
2008 all rights reserved, E&OE
2
www.enpirion.com
August 2008
EN5395QI
Pin Descriptions
PIN
1-3
NAME
NC
FUNCTION
NO CONNECT – This pin should not be electrically connected to any external signal, voltage,
or ground. This pin may be connected internally. However, this pin must be soldered to the
PCB.
NO CONNECT – These pins are internally connected to the common drain output of the
internal MOSFETs. NC(SW) pins are not to be electrically connected to any external signal,
ground, or voltage. However, they must be soldered to the PCB. Failure to follow this guideline
may result in part malfunction or damage.
NO CONNECT – This pin should not be electrically connected to any external signal, voltage,
or ground. This pin may be connected internally. However, this pin must be soldered to the
PCB.
Regulated converter output. Connect these pins to the load and place output capacitor from
these pins the PGND pins 24-26.
NO CONNECT – These pins are internally connected to the common drain output of the
internal MOSFETs. NC(SW) pins are not to be electrically connected to any external signal,
ground, or voltage. However, they must be soldered to the PCB. Failure to follow this guideline
may result in part malfunction or damage.
NO CONNECT – This pin should not be electrically connected to any external signal, voltage,
or ground. This pin may be connected internally. However, this pin must be soldered to the
PCB.
Output power ground. Refer to layout guideline section.
Input power supply. Connect to input power supply. Decouple with input capacitor to PGND.
NO CONNECT – This pin should not be electrically connected to any external signal, voltage,
or ground. This pin may be connected internally. However, this pin must be soldered to the
PCB.
Optional Over Current Protection adjust pin. Place ROCP resistor between this pin and AGND
(pin 40) to adjust the over current trip point.
Analog voltage input for the controller circuits. Connect this pin to the input power supply.
Analog ground for the controller circuits.
NO CONNECT – This pin should not be electrically connected to any external signal, voltage,
or ground. This pin may be connected internally. However, this pin must be soldered to the
PCB.
Voltage select line 2 input. See Table 1.
Voltage select line 1 input. See Table 1.
Voltage select line 0 input. See Table 1.
Power OK is an open drain transistor for power system state indication. POK is a logic high
when VOUT is with -10% to +20% of VOUT nominal.
Remote voltage sense input. Connect this pin to the load voltage at the point to be regulated.
Soft-Start node. The soft-start capacitor is connected between this pin and AGND. The value
of this capacitor determines the startup timing.
Optional Error Amplifier input. Allows for customization of the control loop.
Optional Error Amplifier output. Allows for customization of the control loop.
Output of the buffer leading to the error amplifier. Used for external modifications of the
compensation network.
Input Enable. Applying a logic high, enables the output and initiates a soft-start. Applying a
logic low disables the output.
PWM input/output. Used for optional master/slave configuration. When M/S pin is asserted
“low”, PWM will output the gate-drive PWM waveform. When the M/S pin is asserted “high”,
the PWM pin is configured as an input for PWM signal from the “master” device. PWM pin
can drive up to 3 slave devices.
NO CONNECT – This pin should not be electrically connected to any external signal, voltage,
or ground. This pin may be connected internally. However, this pin must be soldered to the
PCB.
Optional Master/Slave select pin. Asserting pin “low” places device in Master Mode for current
4-5
NC(SW)
6-13
14-20
21-22
NC
VOUT
NC(SW)
23
24-29
30-35
36-37
38
39
40
41-42
43
44
45
46
47
48
49
50
51
52
53
NC
PGND
PVIN
NC
ROCP
AVIN
AGND
NC
VS2
VS1
VS0
POK
VSENSE
SS
EAIN
EAOUT
COMP
ENABLE
PWM
54
55
NC
M/S
©Enpirion
2008 all rights reserved, E&OE
3
www.enpirion.com
August 2008
PIN
NAME
EN5395QI
FUNCTION
sharing. PWM pin (53) will output PWM drive signal. Asserting pin “high” will place the device
in Slave Mode. PWM pin (53) will be configured to input (receive) PWM drive signal from
“Master” device.
NO CONNECT – Do not electrically connect these pins to each other or to PCB. CAUTION!
May be internally connected.
56-58
NC
Block Diagram
POK
PVIN
UVLO
Thermal Limit
Over Voltage
V
OUT
ROCP
Current Limit
Power
Good
Logic
P-Drive
NC(SW)
V
OUT
(-)
(+
)
PWM
Comp
N-Drive
PGND
Sawtooth
Generator
Compensation
Voltage
Selector
VSENSE
(-)
Error
Amp
ENABLE
(+
)
VS0
VS1
VS2
SS
Soft Start
Reference
Voltage
selector
Bandgap
Reference
EAOUT
EAIN COMP
AVIN
AGND
Figure 3. System block diagram.
©Enpirion
2008 all rights reserved, E&OE
4
www.enpirion.com
August 2008
EN5395QI
Absolute Maximum Ratings
CAUTION: Absolute Maximum ratings are stress ratings only. Functional operation beyond
recommended operating conditions is not implied. Stress beyond absolute maximum ratings may
cause permanent damage to the device. Exposure to absolute maximum rated conditions for
extended periods may affect device reliability.
PARAMETER
Input Supply Voltage
Voltages on: ENABLE, V
SENSE
, V
S0
-V
S2
, M/S
Voltages on: EAIN, EAOUT, COMP
Voltages on: SS, PWM
Voltages on: POK
Storage Temperature Range
Reflow Temp, 10 Sec, MSL3 JEDEC J-STD-020A
ESD Rating (based on Human Body Model)
SYMBOL
V
IN
MIN
-0.5
-0.5
-0.5
-0.5
-0.5
-65
2000
MAX
7.0
V
IN
2.5
3.0
V
IN
+ 0.3
150
260
UNITS
V
V
T
STG
°C
°C
V
Recommended Operating Conditions
PARAMETER
SYMBOL
MIN
2.375
0.75
0
-40
-40
MAX
5.5
V
IN
- V
DROPOUT
9
+85
+125
UNITS
V
V
A
°C
°C
Input Voltage Range
V
IN
Output Voltage Range
(NOTE 1)
V
OUT
Output Current
(NOTE 2)
I
OUT
Operating Ambient Temperature
T
A
Operating Junction Temperature
T
J
Note 1:
V
DROPOUT
= I
LOAD
x Dropout Resistance
Note 2:
Reference figures 5 and 6 for the Output Current Derating Curves.
Thermal Characteristics
PARAMETER
SYMBOL
TYP
UNITS
°C/W
°C/W
°C
°C
Thermal Resistance: Junction to Ambient (0 LFM)
(Note 3)
θ
JA
18
Thermal Resistance: Junction to Case (0 LFM)
θ
JC
1.5
Thermal Overload Trip Point
T
J-TP
+150
Thermal Overload Trip Point Hysteresis
20
Note 3:
Based on four layer board and proper thermal design in line with JEDEC EIJ/JESD 51 standards
Electrical Characteristics
NOTE: V
IN
=5.5V over operating temperature range unless otherwise noted.
Typical values are at T
A
= 25°C.
PARAMETER
V
OUT
Initial Accuracy
Overall V
OUT
Accuracy
(Line, Load, and
Temperature combined)
Transient Response Peak
Deviation
Under Voltage Lock out
threshold
Switching Frequency
SYMBOL
∆V
OUT_INIT
∆V
OUT_ALL
TEST CONDITIONS
T
A
= 25C, 2.375V
V
IN
5.5V
I
LOAD
= 1A; T
A
= 25°C
2.4V
V
IN
5.5V
-40°C
T
A
+85°C
0A
I
LOAD
9A
(I
OUT
= 0% to 100% or 100% to
0% or rated load)
V
IN
= 5V, 1.2V
V
OUT
3.3V
C
OUT
= 2 x 47 µF
V
IN
Increasing
V
IN
Decreasing
MIN
-2
-3%
TYP
MAX
2
+3%
UNITS
%
∆V
OUT
V
UVLO
F
SWITCH
5
2.2
2.1
5
%
V
MHz
©Enpirion
2008 all rights reserved, E&OE
5
www.enpirion.com

EN5395QI-T Related Products

EN5395QI-T
Description Switching Regulator/Controller, Voltage-mode, 9A, 5000kHz Switching Freq-Max, PQCC58
Is it Rohs certified? conform to
Maker Intel
package instruction QCCN, LCC58,.39X.47,25
Reach Compliance Code compliant
control mode VOLTAGE-MODE
JESD-30 code R-PQCC-N58
Humidity sensitivity level 3
Number of terminals 58
Maximum operating temperature 85 °C
Minimum operating temperature -40 °C
Maximum output current 9 A
Package body material PLASTIC/EPOXY
encapsulated code QCCN
Encapsulate equivalent code LCC58,.39X.47,25
Package shape RECTANGULAR
Package form CHIP CARRIER
Certification status Not Qualified
surface mount YES
Maximum switching frequency 5000 kHz
Temperature level INDUSTRIAL
Terminal form NO LEAD
Terminal pitch 0.635 mm
Terminal location QUAD
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