P4C1256-12DWC datasheet, PDF - EEWORLD Datasheet

P4C1256-12DWC: DescriptionStandard SRAM, 32KX8, 12ns, CMOS, CDIP28, 0.600 INCH, CERAMIC, DIP-28; Categorystorage storage; File Size1MB，16 Pages; ManufacturerPyramid Semiconductor Corporation; Websitehttp://www.pyramidsemiconductor.com/

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P4C1256-12DWC Overview

Standard SRAM, 32KX8, 12ns, CMOS, CDIP28, 0.600 INCH, CERAMIC, DIP-28

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Pyramid Semiconductor Corporation
Parts packaging code	DIP
package instruction	0.600 INCH, CERAMIC, DIP-28
Contacts	28
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	12 ns
JESD-30 code	R-GDIP-T28
JESD-609 code	e0
memory density	262144 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of functions	1
Number of terminals	28
word count	32768 words
character code	32000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	32KX8
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
Certification status	Not Qualified
Maximum seat height	5.715 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	7.62 mm

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