21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCHR16269
12-Bit to 24-Bit Registered Bus Exchanger
With 3-STATE Outputs
Product Features
•
PI74ALVCHR16269 is designed for low voltage operation
•
V
CC
= 2.3V to 3.6V
•
Hysteresis on all inputs
•
Typical V
OLP
(Output Ground Bounce)
< 0.8V at V
CC
= 3.3V, T
A
= 25°C
•
Typical V
OHV
(Output V
OH
Undershoot)
< 2.0V at V
CC
= 3.3V, T
A
= 25°C
•
All output ports have equivalent 26Ω series resistors,
no external resistors are required
•
Bus Hold retains last active bus state during 3-STATE,
eliminating the need for external pullup resistors
•
Industrial operation at 40°C to +85°C
•
Packages available:
56-pin 240 mil wide plastic TSSOP (A)
56-pin 300 mil wide plastic SSOP (V)
Product Description
Pericom Semiconductor’s PI74ALVCH series of logic circuits are
produced in the Company’s advanced 0.5 micron CMOS technology,
achieving industry leading speed.
The PI7ALVCHR16269 is used in applications in which two separate
ports must be multiplexed onto, or demultiplexed from, a single port.
It is particularly suitable as an interface between synchronous DRAM’s
and high-speed microprocessors.
Data is stored on the internal B-port registers on the low-to-high
transition of the clock (CLK) input when the appropriate clock-enable
(CLKENA) inputs are low. Proper control of these inputs allows two
sequential 12-bit words to be presented as a 24-bit word on the B-port.
For data transfer in the B-to-A direction, a single storage register is
provided. The select (SEL) line selects 1B or 2B data for the A outputs.
The register on the A output permits the fastest possible data transfer,
thus extending the period during which the data is valid on the bus. The
control terminals are registered so that all transactions are synchronous
with CLK. Data flow is controlled by the active-low output enables
(OEA, OEB1, and OEB2).
To ensure the high-impedance state during power up or power
down, a clock pulse should be applied as soon as possible and OE
should be tied to V
CC
through a pullup resistor; the minimum value
of the resistor is determined by the current-sinking capability of the
driver. Due to OE being routed through a register, the active state
of the outputs cannot be determined prior to the arrival of the first
clock pulse.
Active bus-hold circuitry is provided to hold unused or floating
data inputs at a valid logic level.
All outputs are designed to sink up to 12mA and include 26Ω
resistors to reduce overshoot and undershoot.
Logic Block Diagram
1
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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCHR16269
12-Bit To 24-Bit Registered Bus Exchanger with 3-State Outputs
Truth Tables
(1)
Inputs
CLK
OEA
H
H
L
L
OEB
H
L
H
L
A
Z
Z
Active
Active
Outputs
1B,2B
Z
Active
Z
Active
Product Pin Description
Pin Name
OE
CLK
SEL
CLKEN
A,1B,2B
GND
VCC
Description
Output Enable Input (Active LOW)
Clock
Select (Active Low)
Clock Enable (Active Low)
3-State Outputs
Ground
Power
Product Pin Configuration
A to B STORAGE (OEB = L)
INPUTS
OUTPUTS
CLK
X
A
L
H
L
H
L
H
X
1B
L
H
L
H
1B
0(2)
1B
0(2)
1B
0(2)
2B
2B
0(2)
2B
0(2)
L
H
L
H
2B
0(2)
56
55
54
53
52
51
OEB2
CLKENA2
2B4
GND
2B5
2B6
VCC
2B7
2B8
2B9
GND
2B10
2B11
2B12
1B12
1B11
1B10
GND
1B9
1B8
1B7
VCC
1B6
1B5
GND
1B4
CLKENA1
CLK
OEA
OEB1
2B3
GND
2B2
2B1
VCC
A1
A2
A3
GND
A4
A5
A6
A7
A8
A9
GND
A10
A11
A12
VCC
1B1
1B2
GND
1B3
NC
SEL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
CLKENA1 CLKENA2
L
L
L
L
H
H
H
H
H
L
L
L
L
H
56-PIN
50
A56
49
V56
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
B to A STORAGE (OEA = L)
Inputs
CLK
X
X
↑
↑
↑
↑
SEL
H
L
H
H
L
L
1B
X
X
L
Η
X
X
2B
X
X
X
X
L
H
Outputs
A
A0
(2)
A0
(2)
L
H
L
H
Notes:
1. H = High Signal Level
L = Low Signal Level
X = Irrelevant
Z = High Impedance
↑
= Transition, Low to High
2.
Output level before indicated steady state input conditions established
PS8372
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PI74ALVCHR16269
12-Bit To 24-Bit Registered Bus Exchanger with 3-State Outputs
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ................................................ 65°C to +150°C
Supply Voltage Range, V
CC .................................................
0.5V to 4.6V
Input Voltage Range,V
I
: Except
I/O ports
(1) ................................................................................
0.5V to 4.6V
I/O ports
(1,2) ...............................................................
0.5V to V
CC
+ 0.5V
Output Voltage Range, V
O(1,2) ..............................
0.5V to V
CC
+ 0.5V
Input Clamp current, I
IK
(V
I
< 0) ............................................ 50mA
Output Clamp current, I
OK
(V
O
< 0) ....................................... 50mA
Continous Output Current, I
O
.................................................. ±50mA
Continous Current through each V
CC
or GND ...................... ±100mA
Maximum Power Dissipation:
A package ........................................................................................ 1W
V package .....................................................................................1.4W
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
Notes:
1. The input and output negative-voltage ratings maybe exceeded if the input and
outputclamp-current ratings are observed.
2. This value is limited to 4.6V maximum.
DC Electrical Characteristics
(Over the Operating Range, T
A
= –40°C to +85°C, V
CC
= 3.3V ± 10%)
Parame te rs
V
CC
V
IH(1)
V
IL(1)
V
IN(1)
V
OUT(1)
I
OH(1)
De s cription
Supply Voltage
Input HIGH Voltage
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
0
0
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3.0V
I
OL(1)
T
A
At/
∆
V
LOW- level
Output Current
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3.0V
Operating Free- Air Temperature
Input Transition Rise or Fall Rate
- 40
Te s t Conditions
M in.
2.3
1.7
2.0
0.7
0.8
V
CC
V
CC
-6
8
- 12
6
8
12
85
10
ºC
ns/V
mA
V
Typ.
M ax.
3.6
Units
Input LOW Voltage
Input Voltage
Output Voltage
HIGH- level
Output Current
Note:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
3
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PI74ALVCHR16269
12-Bit To 24-Bit Registered Bus Exchanger with 3-State Outputs
DC Electrical Characteristics
-Continued
(Over the Operating Range, T
A
= -40ºC to +85ºC, V
CC
= 3.3V ± 10%
Parame te rs
I
OH
= - 10
0µΑ
I
OH
= - 4mΑ
V
OH
I
OH
= - 6mΑ
I
OH
= - 8mΑ
I
OH
= - 12mΑ
I
OL
= 10
0µΑ
I
OL
= 4mΑ
V
OL
I
OL
= 6mΑ
I
OL
= 8mΑ
I
OL
= 12mΑ
I
I
V
I
= V
CC
or GND
V
I
= 0.7V
V
I
= 1.7V
I
I
(Hold)
(3)
V
I
= 0.8V
V
I
= 2.0V
V
I
= 0 to 3.6V
I
OZ(4)
I
CC
∆Ι
CC
C
I
Control Inputs
C
IO
A or B Ports
V
O
= V
CC
or GND
V
I
= V
CC
or GND, I
O
= 0
O ne input at V
CC
- 0.6V, O ther
inputs at V
CC
or GND
V
I
= V
CC
or GND
V
O
= V
CC
or GND
V
IL
= 0.7V
V
IL
= 0.8V
V
IL
= 0.7V
V
IL
= 0.8V
V
IL
= 0.8V
V
IL
= 0.8V
V
IH
= 1.7V
V
IH
= 2.0V
V
IH
= 1.7V
V
IH
= 2.0V
V
IH
= 2.0V
V
IH
= 2.0V
Te s t Conditions
V
CC
(1)
Min. to Max.
2.3V
2.7V
2.3V
3.0V
2.7V
3.0V
Min. to Max.
2.3V
2.7V
2.3V
3.0V
2.7V
3.0V
3.6V
2.3V
3.0V
3.6V
3.6V
3.6V
3V to 3.6V
3.3V
3.3V
3.5
8.5
45
- 45
75
- 75
±500
±10
40
750
pF
µΑ
M in.
V
CC
- 0.2
1.9
2.2
1.7
2.4
2.0
2.0
0.2
0.4
0.4
0.55
0.55
0.6
0.8
±5
V
Typ.
(2)
M ax.
Units
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25ºC ambient and maximum loading.
3. Bus hold maximum dynamic current required to switch the input from one state to another
4. For I/O ports, the I
OZ
includes the input leakage current.
4
PS8372
01/28/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCHR16269
12-Bit To 24-Bit Registered Bus Exchanger with 3-State Outputs
Timing Requirements over Operating Range
V
CC
= 2.5V ±
0.2V
Parame te rs
f
CLOCK
t
W
Clock frequency
Pulse duration, CLK
High or Low
A data before CLK
↑
B data before CLK
↑
t
SU
Setup time
SEL before CLK
↑
CLK ENA1 or CLK ENA
2
before CLK
↑
O E data before CLK
↑
A data after CLK
↑
B data after CLK
↑
t
H
Hold time
SEL after CLK
↑
CLK ENA1 or CLK ENA
2
after CLK
↑
O E after CLK
↑
5.2
1.4
1.6
0.8
0.8
1.7
0.9
0.8
1.1
1.4
0.9
D e s cription
M in.
M ax.
95
4.3
1.4
1.5
1.1
1
1.6
0.9
0.6
0.8
1
0.8
V
CC
= 2.7V
M in.
M ax.
115
3.3
1
1.1
1.3
0.8
1.2
1.2
1
1.7
1.6
1.2
ns
V
CC
= 3.3V ±
0.3V
M in.
M ax.
135
Units
MHz
Switching Characteristics over Operating Range
(1)
Parame te rs
f
MAX
t
PD
t
EN
t
DIS
CLK
B
A
B
A
B
A
From
(INPUT)
To
(OUTPUT)
V
CC
= 2.5V ± 0.2V
M in.
(2)
95
2.3
1.9
2.5
2.2
3.3
2.7
7.7
6.4
7.7
6.7
8.1
8
M ax.
V
CC
= 2.7V
M in.
(2)
115
6.9
5.8
6.9
6
6.7
6.2
M ax.
V
CC
= 3.3V ± 0.3V
M in
.
(2)
135
2.2
2
2.3
2.1
2.4
2.1
5.8
5.2
5.8
5.3
6
6
ns
M ax.
Units
Notes:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
Operating Characteristics, TA = 25°C
Parame te r
C
PD
Power Dissipation Outputs Enabled
Capacitance per
Outputs Disabled
Exchanger
Te s t
Conditions
C
L
= 0pF,
F = 10 MHz
V
CC
= 2.5V ± 0.2V V
CC
= 3.3V ± 0.3V
Typical
142
115
172
129
Units
pF
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
5
PS8372
01/28/99
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