IC DUAL OP-AMP, 2000 uV OFFSET-MAX, 2 MHz BAND WIDTH, MBCY8, HERMETIC SEALED, METAL CAN, TO-99, 8 PIN, Operational Amplifier
AD644KH Parametric
Parameter Name
Attribute value
Is it lead-free?
Contains lead
Is it Rohs certified?
incompatible
Maker
ADI
Parts packaging code
TO-99
package instruction
, CAN8,.2
Contacts
8
Reach Compliance Code
unknown
ECCN code
EAR99
Amplifier type
OPERATIONAL AMPLIFIER
Architecture
VOLTAGE-FEEDBACK
Maximum average bias current (IIB)
0.000035 µA
Maximum bias current (IIB) at 25C
0.000035 µA
Minimum Common Mode Rejection Ratio
80 dB
Nominal Common Mode Rejection Ratio
80 dB
frequency compensation
YES
Maximum input offset voltage
2000 µV
JESD-30 code
O-MBCY-W8
JESD-609 code
e0
low-bias
YES
low-dissonance
NO
Negative supply voltage upper limit
-18 V
Nominal Negative Supply Voltage (Vsup)
-15 V
Number of functions
2
Number of terminals
8
Maximum operating temperature
70 °C
Minimum operating temperature
Package body material
METAL
Encapsulate equivalent code
CAN8,.2
Package shape
ROUND
Package form
CYLINDRICAL
Peak Reflow Temperature (Celsius)
NOT SPECIFIED
power supply
+-15 V
Certification status
Not Qualified
minimum slew rate
8 V/us
Nominal slew rate
13 V/us
Maximum slew rate
4.5 mA
Supply voltage upper limit
18 V
Nominal supply voltage (Vsup)
15 V
surface mount
NO
technology
BIPOLAR
Temperature level
COMMERCIAL
Terminal surface
Tin/Lead (Sn/Pb)
Terminal form
WIRE
Terminal location
BOTTOM
Maximum time at peak reflow temperature
NOT SPECIFIED
Nominal Uniform Gain Bandwidth
2000 kHz
Minimum voltage gain
40000
AD644KH Preview
a
FEATURES
Matched Offset Voltage
Matched Offset Voltage Over Temperature
Matched Bias Currents
Crosstalk –124 dB at 1 kHz
Low Bias Current: 35 pA max Warmed Up
Low Offset Voltage: 500 V max
Low Input Voltage Noise: 2 V p-p
High Slew Rate: 13 V/ s
Low Quiescent Current: 4.5 mA max
Fast Settling to 0.01%: 3 s
Low Total Harmonic Distortion: 0.0015% at 1 kHz
Standard Dual Amplifier Pinout
Available in Hermetic Metal Can Package
and Chip Form
MIL-STD-883B Processing Available
Single Version Available: AD544
PRODUCT DESCRIPTION
Dual High Speed,
Implanted BiFET Op Amp
AD644
PIN CONFIGURATION
+V
AMPLIFIER NO. 1
8
OUTPUT
1
2
3
TOP
VIEW
4
5
7
6
OUTPUT
AMPLIFIER NO. 2
INVERTING
INPUT
NONINVERTING
INPUT
INVERTING
INPUT
NONINVERTING
INPUT
–V
NOTE:
PIN 4 CONNECTED TO CASE
The AD644 is a pair of matched high speed monolithic FET in-
put operational amplifiers fabricated with the most advanced bi-
polar, JFET and laser-trimming technologies. The AD644 offers
matched bias currents that are significantly lower than currently
available monolithic dual BiFET operational amplifiers: 35 pA
max, matched to 25 pA for the AD644K and L, 75 pA max
matched to 35 pA for the AD644J and S. In addition, the offset
voltage is laser trimmed to less than 0.5 mV, and matched to
0.25 mV for the AD644L, 1.0 mV and matched to 0.5 mV for
the AD644K, utilizing Analog Devices’ laser-wafer trimming
(LWT) process.
The tight matching and temperature tracking between the op-
erational amplifiers is achieved by ion-implanted JFETs and
laser-wafer trimming. Ion-implantation permits the fabrication
of precision, matched JFETs on a monolithic bipolar chip. This
process optimizes the ability to produce matched amplifiers
which have lower initial bias currents than other popular BiFET
op amps. Laser-wafer trimming each amplifier’s input offset
voltage assures tight initial match and superior IC processing
guarantees offset voltage tracking over the temperature range.
The AD644 is recommended for applications in which both
excellent ac and dc performance is required. The matched am-
plifiers provide a low cost solution to true wideband instrumen-
tation amplifiers, low dc drift active filters and output amplifiers
for four quadrant multiplying D/A converters such as the
AD7541, 12-bit CMOS DAC.
The AD644 is available in four versions: the “J”, “K” and “L”
are specified over the 0°C to +70°C temperature range and the
“S” over the –55°C to +125°C operating temperature range.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
All devices are packaged in the hermetically sealed, TO-99
metal can or available in chip form.
PRODUCT HIGHLIGHTS
1. The AD644 has tight side to side matching specifications to
ensure high performance without matching individual devices.
2. Analog Devices, unlike some manufacturers, specifies each
device for the maximum bias current at either input in the
warmed-up condition, thus assuring the user that the AD644
will meet its published specifications in actual use.
3. Laser-wafer-trimming reduces offset voltage to as low as
0.5 mV max matched side to side to 0.25 mV (AD644L),
thus eliminating the need for external nulling.
4. Improved bipolar and JFET processing on the AD644 result
in the lowest matched bias current available in a high speed
monolithic FET op amp.
5. Low voltage noise (2
µV
p-p) and high open loop gain
enhance the AD644’s performance as a precision op amp.
6. The high slew rate (13.0 V/µs) and fast settling time to
0.01% (3.0
µs)
make the AD644 ideal for D/A, A/D, sample-
hold circuits and dual high speed integrators.
7. Low harmonic distortion (0.0015%) and low crosstalk
(–124 dB) make the AD644 an ideal choice for stereo audio
applications.
8. The standard dual amplifier pin out allows the AD644 to
replace lower performance duals without redesign.
9. The AD644 is available in chip form.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
AD644–SPECIFICATIONS
(@ +25 C and V =
S
15 V dc)
Max
Min
50,000
40,000
AD644L
Typ
Max
Min
50,000
20,000
±
12
±
13
25
2.0
200
13.0
0.0015
0.5
1.0
100
10
5
35
10
5
10
12
±
12
±
13
25
2.0
200
13.0
0.0015
1.0
3.5
100
35
AD644S
Typ
Max
Units
V/V
V/V
V
V
mA
MHz
kHz
V/µs
%
mV
mV
µV/V
pA
pA
mV
mV
pA
dB
MΩ pF
MΩ pF
V
V
dB
µV
p-p
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
V
V
mA
°C
°C
Model
Min
OPEN LOOP GAIN
V
O
=
±
10 V, R
L
≥
2 kΩ
T
MIN
to T
MAX
, R
L
= 2 kΩ
OUTPUT CHARACTERISTICS
Voltage @ R
L
= 2 kΩ, T
MIN
to T
MAX
Voltage @ R
L
= 10 kΩ, T
MIN
to T
MAX
Short Circuit Current
FREQUENCY RESPONSE
Unity Gain Small Signal
Full Power Response
Slew Rate, Unity Gain
Total Harmonic Distortion
INPUT OFFSET VOLTAGE
1
Initial Offset
Input Offset Voltage T
MIN
to T
MAX
Input Offset Voltage vs. Supply,
T
MIN
to T
MAX
INPUT BIAS CURRENT
2
Either Input
Offset Current
MATCHING CHARACTERISTICS
3
Input Offset Voltage
Input Offset Voltage T
MIN
to T
MAX
Input Bias Current
Crosstalk
INPUT IMPEDANCE
Differential
Common Mode
INPUT VOLTAGE RANGE
Differential
4
Common Mode
Common-Mode Rejection
INPUT NOISE
Voltage 0.1 Hz to 10 Hz
f = 10 Hz
f = 100 Hz
f = 1 kHz
f = 10 kHz
POWER SUPPLY
Rated Performance
Operating
Quiescent Current
TEMPERATURE RANGE
Operating, Rated Performance
Storage
PACKAGE OPTION
TO-99 Style (H-08B)
Chips
30,000
20,000
10
12
AD644J
Typ
Max
Min
50,000
40,000
AD644K
Typ
±
12
±
13
25
2.0
200
13.0
0.0015
2.0
3.5
200
10
10
75
10
12
±
12
±
13
25
2.0
200
13.0
0.0015
1.0
2.0
100
10
5
35
10
12
8.0
8.0
8.0
8.0
1.0
3.5
35
–124
10
12
6
10
12
3
±
20
±
12
–124
10
12
6
10
12
3
±
20
±
12
0.5
2.0
25
–124
10
12
6
10
12
3
±
20
±
12
0.25
1.0
25
–124
10
12
6
10
12
3
±
20
±
12
0.5
3.5
35
±
10
76
±
10
80
±
10
80
±
10
80
2
35
22
18
16
±
15
3.5
0
–65
AD644JH
AD644JChips
2
35
22
18
16
±
15
3.5
0
–65
AD644KH
AD644KChips
2
35
22
18
16
±
15
3.5
0
–65
AD644LH
2
35
22
18
16
±
15
3.5
–55
–65
AD644SH
AD644SChips
±
5
±
18
4.5
+70
+150
±
5
±
18
4.5
+70
+150
±
5
±
18
4.5
+70
+150
±
5
±
18
4.5
+125
+150
NOTES
1
Input Offset Voltage specifications are guaranteed after 5 minutes of operation at T
A
= +25°C.
2
Bias Current specifications are guaranteed at maximum at either input after 5 minutes of operation at T
A
= +25°C. For higher temperatures, the current doubles every 10°C.
3
Matching is defined as the difference between parameters of the two amplifiers.
4
Defined as voltage between inputs, such that neither exceeds
±
10 V from ground.
Specifications shown in
boldface
are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max specifications
are guaranteed, although only those shown in
boldface
are tested on all production units.
Specifications subject to change without notice.
METALIZATION PHOTOGRAPH
Dimensions shown in inches and (mm).
Contact factory for latest dimensions.
–2–
REV. A
Typical Characteristics–AD644
REV. A
–3–
AD644
–4–
REV. A
AD644
low pass filter formed by the 100
Ω
series resistor and the load
capacitance, C
L
.
The low input bias current (35 pA), low noise, high slew rate
and high bandwidth characteristics of the AD644 make it suit-
able for electrometer applications such as photodiode preampli-
fiers and picoampere current-to-voltage converters. The use of
guarding techniques in printed circuit board layout and con-
struction is critical for achieving the ultimate in low leakage per-
formance that the AD644 can deliver. The input guarding
scheme shown in Figure 25 will minimize leakage as much as
possible. The same layout should be used on both sides of a
double side board. The guard ring is connected to a low imped-
ance potential at the same level as the inputs. High impedance
signal lines should not be extended for any unnecessary length
on a printed circuit; to minimize noise and leakage, such con-
ductors should be replaced by rigid shielded cables.
The fast settling time (3.0
µs
to 0.01% for 20 V p-p step) and
low offset voltage make the AD644 an excellent choice as an
output amplifier for current output D/A converters such as the
AD7541. The upper trace of the oscilloscope photograph of Fig-
ure 23b shows the settling characteristics of the AD644. The
lower trace represents the input to Figure 23a. The AD644 has
been designed for fast settling to 0.01%, however, feedback
components, circuit layout and circuit design must be carefully
considered to obtain the optimum settling time.
Figure 25. Board Layout for Guarding Inputs
INPUT PROTECTION
The AD644 is guaranteed for a maximum safe input potential
equal to the power supply potential. The input stage design also
allows differential input voltages of up to
±
1 volt while main-
taining the full differential input resistance of 10
12
Ω.
This
makes the AD644 suitable for comparator situations employing
a direct connection to high impedance source.
Many instrumentation situations, such as flame detectors in gas
chromatographs, involve measurement of low level currents
from high voltage sources. In such applications, a sensor fault
condition may apply a very high potential to the input of the
current-to-voltage converting amplifier. This possibility necessi-
tates some form of input protection. Many electrometer type
devices, especially CMOS designs, can require elaborate Zener
protection schemes which often compromise overall performance.
The AD644 requires input protection only if the source is not
current-limited, and as such is similar to many JFET-input
designs. The failure mode would be overheating from excess
current rather than voltage breakdown. If the source is not
current-limited, all that is required is a resistor in series with the
affected input terminal so that the maximum overload current is
1.0 mA (for example, 100 kΩ for a 100 volt overload). This
simple scheme will cause no significant reduction in perfor-
mance and give complete overload protection. Figure 26 shows
proper connections.
The circuit in Figure 24 employs a 100
Ω
isolation resistor
which enables the amplifier to drive capacitive loads exceeding
500 pF; the resistor effectively isolates the high frequency feed-
back from the load and stabilizes the circuit. Low frequency
feedback is returned to the amplifier summing junction via the
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