ISPLSI2032VE-200LB49 datasheet, PDF

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ISPLSI2032VE-200LB49: DescriptionEE PLD, 6ns, 32-Cell, CMOS, PBGA49, BGA-49; CategoryProgrammable logic devices Programmable logic; File Size647KB，14 Pages; ManufacturerLattice; Websitehttp://www.latticesemi.com

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ISPLSI2032VE-200LB49 Overview

EE PLD, 6ns, 32-Cell, CMOS, PBGA49, BGA-49

ISPLSI2032VE-200LB49 Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Lattice
Parts packaging code	BGA
package instruction	BGA-49
Contacts	49
Reach Compliance Code	compliant
ECCN code	EAR99
Other features	YES
maximum clock frequency	154 MHz
In-system programmable	YES
JESD-30 code	S-PBGA-B49
JESD-609 code	e0
JTAG BST	NO
length	7 mm
Dedicated input times
Number of I/O lines	32
Number of macro cells	32
Number of terminals	49
Maximum operating temperature	70 °C
Minimum operating temperature
organize	0 DEDICATED INPUTS, 32 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	LFBGA
Encapsulate equivalent code	BGA49,7X7,32
Package shape	SQUARE
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Programmable logic type	EE PLD
propagation delay	6 ns
Certification status	Not Qualified
Maximum seat height	1.5 mm
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7 mm

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ISPLSI2032VE-200LB49 Related Products

	ISPLSI2032VE-200LB49	ISPLSI2032VE-200LJ44	ISPLSI2032VE-200LT48
Description	EE PLD, 6ns, 32-Cell, CMOS, PBGA49, BGA-49	EE PLD, 6ns, 32-Cell, CMOS, PQCC44, PLASTIC, LCC-44	EE PLD, 6ns, CMOS, PQFP48, TQFP-48
Is it lead-free?	Contains lead	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible	incompatible
Maker	Lattice	Lattice	Lattice
Parts packaging code	BGA	LCC	QFP
package instruction	BGA-49	PLASTIC, LCC-44	TQFP-48
Contacts	49	44	48
Reach Compliance Code	compliant	unknown	not_compliant
ECCN code	EAR99	EAR99	EAR99
maximum clock frequency	154 MHz	154 MHz	154 MHz
JESD-30 code	S-PBGA-B49	S-PQCC-J44	S-PQFP-G48
JESD-609 code	e0	e0	e0
length	7 mm	16.5862 mm	7 mm
Number of I/O lines	32	32	32
Number of terminals	49	44	48
Maximum operating temperature	70 °C	70 °C	70 °C
organize	0 DEDICATED INPUTS, 32 I/O	0 DEDICATED INPUTS, 32 I/O	0 DEDICATED INPUTS, 32 I/O
Output function	MACROCELL	MACROCELL	MACROCELL
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LFBGA	QCCJ	FQFP
Package shape	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH	CHIP CARRIER	FLATPACK, FINE PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	225	240
Programmable logic type	EE PLD	EE PLD	EE PLD
propagation delay	6 ns	6 ns	6 ns
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum supply voltage	3.6 V	3.6 V	3.6 V
Minimum supply voltage	3 V	3 V	3 V
Nominal supply voltage	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	BALL	J BEND	GULL WING
Terminal pitch	0.8 mm	1.27 mm	0.5 mm
Terminal location	BOTTOM	QUAD	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	30	30
width	7 mm	16.5862 mm	7 mm
Other features	YES	YES	-
In-system programmable	YES	YES	-
JTAG BST	NO	NO	-
Number of macro cells	32	32	-
Encapsulate equivalent code	BGA49,7X7,32	LDCC44,.7SQ	-
power supply	3.3 V	3.3 V	-
Maximum seat height	1.5 mm	4.57 mm	-

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