EEWORLDEEWORLDEEWORLD

Part Number

Search

7142SA25FI

Description
Dual-Port SRAM, 2KX8, 25ns, CMOS, CQFP48, 0.750 X 0.750 INCH, 0.110 INCH HEIGHT, CERAMIC, FP-48
Categorystorage    storage   
File Size251KB,16 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

7142SA25FI Overview

Dual-Port SRAM, 2KX8, 25ns, CMOS, CQFP48, 0.750 X 0.750 INCH, 0.110 INCH HEIGHT, CERAMIC, FP-48

7142SA25FI Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeQFP
package instructionQFF, QFL48,.75SQ
Contacts48
Reach Compliance Codenot_compliant
ECCN codeEAR99
Maximum access time25 ns
I/O typeCOMMON
JESD-30 codeS-CQFP-F48
JESD-609 codee0
memory density16384 bit
Memory IC TypeDUAL-PORT SRAM
memory width8
Number of functions1
Number of ports2
Number of terminals48
word count2048 words
character code2000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize2KX8
Output characteristics3-STATE
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeQFF
Encapsulate equivalent codeQFL48,.75SQ
Package shapeSQUARE
Package formFLATPACK
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)225
power supply5 V
Certification statusNot Qualified
Maximum standby current0.03 A
Minimum standby current4.5 V
Maximum slew rate0.28 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formFLAT
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
HIGH SPEED
2K x 8 DUAL PORT
STATIC RAM
IDT7132SA/LA
IDT7142SA/LA
Features
High-speed access
– Commercial: 20/25/35/55/100ns (max.)
– Industrial: 25ns (max.)
– Military: 25/35/55/100ns (max.)
Low-power operation
– IDT7132/42SA
Active: 325mW (typ.)
Standby: 5mW (typ.)
– IDT7132/42LA
Active: 325mW (typ.)
Standby: 1mW (typ.)
MASTER IDT7132 easily expands data bus width to 16-or-more
bits using SLAVE IDT7142
On-chip port arbitration logic (IDT7132 only)
BUSY
output flag on IDT7132;
BUSY
input on IDT7142
Battery backup operation —2V data retention (LA only)
TTL-compatible, single 5V ±10% power supply
Available in 48-pin DIP, LCC and Flatpack, and 52-pin PLCC
packages
Military product compliant to MIL-PRF-38535 QML
Industrial temperature range (–40°C to +85°C) is available for
selected speeds
Functional Block Diagram
OE
L
CE
L
R/W
L
OE
R
CE
R
R/W
R
I/O
OL-
I/O
7L
I/O
Control
I/O
Control
I/O
OR-
I/O
7R
m
BUSY
L
(1,2)
A
10L
A
0L
Address
Decoder
11
BUSY
R
(1,2)
MEMORY
ARRAY
11
Address
Decoder
A
10R
A
0R
CE
L
OE
L
R/W
L
ARBITRATION
LOGIC
CE
R
OE
R
R/W
R
2692 drw 01
NOTES:
1. IDT7132 (MASTER):
BUSY
is open drain output and requires pullup resistor of 270Ω.
IDT7142 (SLAVE):
BUSY
is input.
2. Open drain output: requires pullup resistor of 270Ω.
JUNE 2004
1
©2004 Integrated Device Technology, Inc.
DSC-2692/16

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号