Phase Locked Loop, CMOS, CDIP16
| Parameter Name | Attribute value |
| Is it Rohs certified? | incompatible |
| Maker | Harris |
| package instruction | DIP, DIP16,.3 |
| Reach Compliance Code | unknown |
| Analog Integrated Circuits - Other Types | PHASE LOCKED LOOP |
| JESD-30 code | R-GDIP-T16 |
| JESD-609 code | e0 |
| Number of functions | 1 |
| Number of terminals | 16 |
| Maximum operating temperature | 125 °C |
| Minimum operating temperature | -55 °C |
| Package body material | CERAMIC, GLASS-SEALED |
| encapsulated code | DIP |
| Encapsulate equivalent code | DIP16,.3 |
| Package shape | RECTANGULAR |
| Package form | IN-LINE |
| power supply | 5 V |
| Certification status | Not Qualified |
| Maximum supply current (Isup) | 0.16 mA |
| Maximum supply voltage (Vsup) | 5.5 V |
| Minimum supply voltage (Vsup) | 4.5 V |
| Nominal supply voltage (Vsup) | 5 V |
| surface mount | NO |
| technology | CMOS |
| Temperature level | MILITARY |
| Terminal surface | Tin/Lead (Sn/Pb) |
| Terminal form | THROUGH-HOLE |
| Terminal pitch | 2.54 mm |
| Terminal location | DUAL |
EEWorld
subscription
account
EEWorld
service
account
Automotive
development
circle
京公网安备 11010802033920号
EEWORLD
