CY2LL842ZI datasheet, PDF - EEWORLD Datasheet

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CY2LL842ZI: DescriptionLine Transceiver, 2 Func, 2 Driver, 2 Rcvr, PDSO16, 4.40 MM, TSSOP-16; CategoryAnalog mixed-signal IC Drivers and interfaces; File Size159KB，14 Pages; ManufacturerCypress Semiconductor

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CY2LL842ZI Overview

Line Transceiver, 2 Func, 2 Driver, 2 Rcvr, PDSO16, 4.40 MM, TSSOP-16

CY2LL842ZI Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Cypress Semiconductor
Parts packaging code	TSSOP
package instruction	TSSOP, TSSOP16,.25
Contacts	16
Reach Compliance Code	not_compliant
ECCN code	EAR99
Differential output	YES
Number of drives	2
Input properties	DIFFERENTIAL
Interface integrated circuit type	LINE TRANSCEIVER
Interface standards	EIA-644; TIA-644
JESD-30 code	R-PDSO-G16
JESD-609 code	e0
length	5 mm
Number of functions	2
Number of terminals	16
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Minimum output swing	0.247 V
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP16,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Certification status	Not Qualified
Maximum receive delay	6 ns
Number of receiver bits	2
Maximum seat height	1.1 mm
Maximum slew rate	25 mA
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
maximum transmission delay	6 ns
width	4.4 mm

CY2LL842ZI Preview

ComLink™ Series

CY2LL842

Two-channel LVDS Repeater/Mux

Features

•

ANSI TIA/EIA-644-1995-compliant

Does not exceed Belcore 802.3 standards

Operation at => 350 MHz–700 Mbps

Single 2 × 2

Low-voltage differential signaling (LVDS) with output

voltages of

350 mV into 100-ohm load version (Std)

Single 3.3V supply

Accepts

350 mV differential inputs

Output drivers are high-impedance when disabled or

when V

≤

1.5V

16-pin SOIC/TSSOP packages

Industrial version available

Description

The CYPRESS CY2LL842 are differential line drivers and

receivers that utilize LVDS to achieve signaling rates of 650

Mbs. The receiver outputs can be switched to either or both

drivers thru the multiplexer control signals S0/S1. This

provides flexibility in application for either a splitter or router

configuration with a single device.

The CYPRESS CY2LL842 is configured as a single

two-channel repeater/Mux.

The LVDS standard provides a minimum differential output

voltage of 247 mV into a 100-ohm load and receipt of as little

as 100-mV signals with up to 1V of DC offset between trans-

mitter and receiver.

A doubly terminated bus LVDS line enables multipoint config-

urations.

Designed for both point to point based-band multi-point data

transmission over controlled impedance lines.

Block Diagram

Pin Configuration

VDD

1DE

GND

2DE

VDD

2DE

GND

S0 S1

16 pin SOIC/TSSOP

Cypress Semiconductor Corporation

Document #: 38-07063 Rev. **

•

3901 North First Street

•

San Jose

•

CY2LL842

CA 95134 • 408-943-2600

Revised July 29, 2002

ComLink™ Series

CY2LL842

Pin Description

Pin Number

1,2

6,7

8,9

10,11

14,13

15,16

Pin Name

1B, 1A

1DE

2A, 2B

Differential Input Channel 1

Function Select 0

Data Enable Channel 1

Function Select 1

Differential Input Channel 2

Ground

Differential Output Channel 2

Data Enable Channel 2

Differential Output Channel 1

Supply Voltage

Output

[1]

1Y/1Z

1A/1B

2A/2B

1A/1B

2A/2B

2Y/2Z

1A/1B

2A/2B

1A/1B

–0.5V to 4V

–0.5V to 6.0V

–0.5V to V

+0.5V

Class 3, A: 2KV, B: 500V

–65°C to 150°C

Pin Description

2Y, 2Z

2DE

IY, 1Z

Input

Table 1. Mux Function Table

Function

Splitter A

Splitter B

Pass Thru Router

Cross Point Router

Table 2. Absolute Maximum Rating Over Operating Free-air Temperature

[2]

Supply Voltage Range, V

(1)

Voltage Range (DE,S0,S1)

Input Voltage Range, V

(A or B)

ESD (All pins)

Storage Temperature Range

Table 3. Recommended Operating Conditions

Parameter

VITH+

VITH-

II (Off)

Description

Supply Voltage

High-level Input Voltage

(S0,S1,1DE,2DE)

Low-level Input Voltage

(S0,S1,1DE,2DE)

Magnitude of Differential Input Voltage

0.1

Common Mode Input Voltage

( see

Figure 6,Figure 7,

and

Figure 8)

Operating Free Air Temperature

–40

Description

Positive-going Differential Input Voltage Threshold

Negative-going Differential Input Voltage Threshold

Input Current ( A Inputs)

Input Current (B Inputs)

Power-off Current (A or B Inputs)

Test Conditilons

= 1.2V

VI = 0V

VI = 2.4V

VI = 0.8V

VI = 2.4V

= 0V

Min.

Typ.

3.3

Max.

3.6

0.8

0.6

2.4–(VID/2)

Typ.

Max.

100

–10

Unit

°C

Unit

Table 4. Receiver Electrical Characteristics Over Recommended Operating Conditions

Min.

–100

–0.5

0.5

0.1

Notes:

1. See

Figure 1.

2. Stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. This is intended to be a stress rating only

and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied.

Exposure to absolute maximum rating conditions for extended periods may affect reliability.

Document #: 38-07063 Rev. **

Page 2 of 14

ComLink™ Series

CY2LL842

Table 5. Receiver Electrical Characteristics Over Recommended Operating Conditions

Parameter

(SS)

(PP)

Description

Differential Output Voltage Swing

Change in differential Output Voltage Swing

between logic states

Steady State Common-mode output voltage

Change in Steady State Common-mode

output between logic states

Peak to Peak Common-mode output voltage

Supply Current

No load f = 100 MHz

RL = 100 ohm f = 100 MHz

Both Channels Disabled f = 100 MHz

High-level Input Current

Low-level Input Current

Short-circuit Current

High-impedance Output Current

Input Capacitance

Control Input Capacitance

S0,S1,DE

= 5V

= 0.8V

or V

= 0V

= 60mV

= 0V or V

1A, 1B, 2A, 2B

S0, S1, 1DE, 2DE

0.1

See

Figure 10

Test Conditions

RL = 100 Ohm

See

Figure 9

Min. Typ. Max. Unit

247

–50

1.125

–50

340

454

1.375

150

Table 6. Differential Receiver to Driver Switching Characteristics Over Recommended Operating Conditions

[4]

Parameter

PLH

PHL

sk(p)

PHZ

PLZ

PZH

PZL

PHL_skR1_Dx

PLH_skR1_Dx

PPHL_skR2_Dx

PLH_skR2_Dx

(P-P)

Description

Differential Propagation delay, low to high

Differential Propagation delay, high to low

Pulse Skew ( T

PHL

–T

PLH

)

Transition Low to High

Transition High to Low

Propagation delay, high-level to high-impedance output

Propagation delay, low-level to high-impedance output

Propagation delay, high-impedance to high-level output

Propagation delay, high-impedance to low-level output

Channel to Channel skew-receiver 1 to Any mux related

drivers

Channel to Channel skew-receiver 1 to Any mux related

drivers

Channel to Channel skew-receiver 2 to Any mux related

drivers

Channel to Channel skew-receiver 2 to Any mux related

drivers

Deterministic Jitter (100 MHz 25C VID = 0.4 So,S1=00)

PRBS Differential

(see

Figure 12)

Test Conditions

CL = 10 pF

(see

Figure 11)

Min.

Typ.

[3]

0.2

800

4.3

1500

Max.

Unit

Notes:

3. All typical values are measured at 25°C with a 3.3V supply.

4. These parameters are measured over supply voltage and temperature ranges recommended for the device.

Document #: 38-07063 Rev. **

Page 3 of 14

ComLink™ Series

CY2LL842

High-frequency Parametrics

Parameter

Fmax

Description

Test Conditions

Min.

Typ.

Max.

400

Unit

MHz

Maximum frequency V

= 3.3V 50% duty cycle tW(50–50)

Standard Load Circuit.

Router Options

S 0/S 1

Splitter O ptions

S 0/S1

1A /1B

1Y/1Z

1A/1B

1Y/1Z

Cross

Point

Router

Splitter A

2A/2B

2Y /2Z

2A/2B

2Y/2Z

1A /1B

1Y/1Z

Pass

Thru

Router

1A/1B

1Y/1Z

Splitter B

2A /2B

2Y /2Z

2A/2B

2Y/2Z

S 0/S 1

S 0/S1

Figure 1. 2 Channel Cross Point Switch/Mux

Document #: 38-07063 Rev. **

Page 4 of 14

ComLink™ Series

CY2LL842

Dynamic IDD CY2LL842C

VID=0.4, VIC=1.2V S0, S1=00

Temp = 25°C

45.00

40.00

35.00

Idd (mA)

Dynamic IDD CY2LL842C

VID=0.4, VIC=1.2V S0, S1=01

Temp = 25°C

45.00

40.00

35.00

Idd (mA)

Vdd=3.00V

30.00

25.00

20.00

15.00

100

150

200

250

300

350

400

Fin (MHz)

Vdd=3.30V

Vdd=3.60V

30.00

25.00

Vdd=3.00V

20.00

15.00

100

150

200

250

300

Vdd=3.30V

Vdd=3.60V

350

400

Fin (MHz)

Dynamic IDD CY2LL842C

VID=0.4, VIC=1.2V S0, S1=00

Temp = 85°C

45.00

40.00

35.00

Idd (mA)

Dynamic IDD CY2LL842C

VID=0.4, VIC=1.2V S0, S1=01

Temp = 85°C

45.00

40.00

35.00

30.00

25.00

Vdd=3.00V

30.00

25.00

20.00

15.00

100

150

200

250

300

350

400

Fin (MHz)

Vdd=3.00V

Vdd=3.30V

Vdd=3.60V

20.00

15.00

100

150

200

250

300

Vdd=3.30V

Vdd=3.60V

350

400

Fin (MHz)

Figure 2. IDD vs. Frequency

Document #: 38-07063 Rev. **

Page 5 of 14

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Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	Cypress Semiconductor	Cypress Semiconductor	Cypress Semiconductor	Cypress Semiconductor	Cypress Semiconductor	Cypress Semiconductor	Cypress Semiconductor	Cypress Semiconductor
Parts packaging code	TSSOP	SOIC	SOIC	SOIC	SOIC	TSSOP	TSSOP	TSSOP
package instruction	TSSOP, TSSOP16,.25	SOP, SOP16,.25	SOP, SOP16,.25	SOP, SOP16,.25	SOP, SOP16,.25	TSSOP, TSSOP16,.25	TSSOP, TSSOP16,.25	TSSOP, TSSOP16,.25
Contacts	16	16	16	16	16	16	16	16
Reach Compliance Code	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
Differential output	YES	YES	YES	YES	YES	YES	YES	YES
Number of drives	2	2	2	2	2	2	2	2
Input properties	DIFFERENTIAL	DIFFERENTIAL	DIFFERENTIAL	DIFFERENTIAL	DIFFERENTIAL	DIFFERENTIAL	DIFFERENTIAL	DIFFERENTIAL
Interface integrated circuit type	LINE TRANSCEIVER	LINE TRANSCEIVER	LINE TRANSCEIVER	LINE TRANSCEIVER	LINE TRANSCEIVER	LINE TRANSCEIVER	LINE TRANSCEIVER	LINE TRANSCEIVER
Interface standards	EIA-644; TIA-644	EIA-644; TIA-644	EIA-644; TIA-644	EIA-644; TIA-644	EIA-644; TIA-644	EIA-644; TIA-644	EIA-644; TIA-644	EIA-644; TIA-644
JESD-30 code	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16
JESD-609 code	e0	e0	e0	e0	e0	e0	e0	e0
length	5 mm	9.8933 mm	9.8933 mm	9.8933 mm	9.8933 mm	5 mm	5 mm	5 mm
Number of functions	2	2	2	2	2	2	2	2
Number of terminals	16	16	16	16	16	16	16	16
Maximum operating temperature	85 °C	70 °C	70 °C	85 °C	85 °C	70 °C	70 °C	85 °C
Minimum output swing	0.247 V	0.247 V	0.247 V	0.247 V	0.247 V	0.247 V	0.247 V	0.247 V
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	SOP	SOP	SOP	SOP	TSSOP	TSSOP	TSSOP
Encapsulate equivalent code	TSSOP16,.25	SOP16,.25	SOP16,.25	SOP16,.25	SOP16,.25	TSSOP16,.25	TSSOP16,.25	TSSOP16,.25
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum receive delay	6 ns	6 ns	6 ns	6 ns	6 ns	6 ns	6 ns	6 ns
Number of receiver bits	2	2	2	2	2	2	2	2
Maximum seat height	1.1 mm	1.7272 mm	1.7272 mm	1.7272 mm	1.7272 mm	1.1 mm	1.1 mm	1.1 mm
Maximum slew rate	25 mA	25 mA	25 mA	25 mA	25 mA	25 mA	25 mA	25 mA
Maximum supply voltage	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V
Nominal supply voltage	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES
Temperature level	INDUSTRIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.65 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	0.65 mm	0.65 mm	0.65 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
maximum transmission delay	6 ns	6 ns	6 ns	6 ns	6 ns	6 ns	6 ns	6 ns
width	4.4 mm	3.899 mm	3.899 mm	3.899 mm	3.899 mm	4.4 mm	4.4 mm	4.4 mm

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