CD4046BKMSR datasheet, PDF - EEWORLD Datasheet

CD4046BKMSR: DescriptionPHASE LOCKED LOOP, 1.4MHz, CDFP16; CategoryAnalog mixed-signal IC The signal circuit; File Size453KB，11 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/

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CD4046BKMSR Overview

PHASE LOCKED LOOP, 1.4MHz, CDFP16

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Renesas Electronics Corporation
Parts packaging code	DFP
package instruction	DFP, FL16,.3
Contacts	16
Reach Compliance Code	not_compliant
Analog Integrated Circuits - Other Types	PHASE LOCKED LOOP
JESD-30 code	R-CDFP-F16
JESD-609 code	e0
Number of functions	1
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DFP
Encapsulate equivalent code	FL16,.3
Package shape	RECTANGULAR
Package form	FLATPACK
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5/15 V
Certification status	Not Qualified
Maximum seat height	2.92 mm
Maximum supply voltage (Vsup)	15 V
Minimum supply voltage (Vsup)	5 V
Nominal supply voltage (Vsup)	10 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	FLAT
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	6.73 mm

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