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SN65LVDS32A, SN65LVDT32A, SN65LVDS3486A
SN65LVDT3486A, SN65LVDS9637A, SN65LVDT9637A
HIGH SPEED DIFFERENTIAL RECEIVERS
SLLS368E − JULY 1999 − REVISED JUNE 2001
D
Meets or Exceeds the Requirements of
D
D
D
D
D
D
D
D
D
D
ANSI EIA/TIA-644 Standard for Signaling
Rates
†
up to 400 Mbps
Operates With a Single 3.3-V Supply
−2-V to 4.4-V Common-Mode Input Voltage
Range
Differential Input Thresholds <50 mV With
50 mV of Hysteresis Over Entire
Common-Mode Input Voltage Range
Integrated 110-Ω Line Termination
Resistors Offered With the LVDT Series
Propagation Delay Times 4 ns (typ)
Active Fail Safe Assures a High-Level
Output With No Input
Recommended Maximum Parallel Rate of
100 M-Transfers/s
Outputs High-Impedance With V
CC
<1.5 V
Available in Small-Outline Package With
1,27 mm Terminal Pitch
Pin-Compatible With the AM26LS32,
MC3486, or
µA9637
NOT RECOMMENDED FOR NEW DESIGNS
For Replacement Use SN65LVDS32B or SN65LVDT32B
SN65LVDS32A, SN65LVDT32A
Logic Diagram
(positive logic)
G
D PACKAGE
(TOP VIEW)
G
SN65LVDT32A
ONLY (4 Places)
1A
1B
2A
2B
3A
3B
4A
4B
1B
1A
1Y
G
2Y
2A
2B
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
4B
4A
4Y
G
3Y
3A
3B
1Y
2Y
3Y
4Y
For Replacement Use SN65LVDS3486B or SN65LVDT3486B
D PACKAGE
(TOP VIEW)
description
This family of differential line receivers offers
improved performance and features that imple-
ment the electrical characteristics of low-voltage
differential signaling (LVDS). LVDS is defined in
the TIA/EIA-644 standard. This improved perfor-
mance represents the second generation of
receiver products for this standard, providing a
better overall solution for the cabled environment.
The next generation family of products is an
extension to TI’s overall product portfolio and is
not necessarily a replacement for older LVDS
receivers.
1B
1A
1Y
1,2EN
2Y
2A
2B
GND
SN65LVDS3486A, SN65LVDT3486A
Logic Diagram
(positive logic)
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
V
CC
ONLY (4 Places)
1A
4B
4A
1B
1,2EN
4Y
2A
3,4EN
3Y
2B
3A
3A
3B
3B
3,4EN
4A
4B
SN65LVDT3486A
1Y
2Y
3Y
4Y
Improved features include an input common-
For Replacement Use SN65LVDS9637B or SN65LVDT9637B
mode voltage range 2 V wider than the minimum
SN65LVDS9637A, SN65LVDT9637A
required by the standard. This will allow longer
D PACKAGE
Logic Diagram
cable lengths by tripling the allowable ground
(TOP VIEW)
(positive logic)
noise tolerance to 3 V between a driver and
V
CC 1
8
1A
receiver.
1Y
2Y
GND
2
3
4
7
6
5
1B
2A
2B
1A
1B
1Y
SN65LVDT9637A
ONLY
2A
2B
2Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
† Signaling rate, 1/t, where t is the minimum unit interval and is expressed in the units bits/s (bits per second)
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
2001, Texas Instruments Incorporated
POST OFFICE BOX 655303
•
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1
SLLS368E − JULY 1999 − REVISED JUNE 2001
SN65LVDS32A, SN65LVDT32A, SN65LVDS3486A
SN65LVDT3486A, SN65LVDS9637A, SN65LVDT9637A
HIGH SPEED DIFFERENTIAL RECEIVERS
description (continued)
Precise control of the differential input voltage thresholds now allows for inclusion of 50 mV of input voltage
hysteresis to improve noise rejection on slowly changing input signals. The input thresholds are still no more
than
±50
mV over the full input common-mode voltage range.
The high-speed switching of LVDS signals almost always necessitates the use of a line impedance matching
resistor at the receiving-end of the cable or transmission media. The SN65LVDT series of receivers eliminates
this external resistor by integrating it with the receiver. The nonterminated SN65LVDS series is also available
for multidrop or other termination circuits.
The receivers also include a (patent pending) fail-safe circuit that will provide a high-level output within 600 ns
after loss of the input signal. The most common causes of signal loss are disconnected cables, shorted lines,
or powered-down transmitters. This prevents noise from being received as valid data under these fault
conditions. This feature may also be used for wired-OR bus signaling.
The intended application of these devices and signaling technique is for point-to-point baseband data
transmission over controlled impedance media of approximately 100
Ω.
The transmission media may be
printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent
upon the attenuation characteristics of the media and the noise coupling to the environment.
The SN65LVDS32A, SN65LVDT32A, SN65LVDS3486A, SN65LVDT3486A, SN65LVDS9637A, and
SN65LVDT9637A are characterized for operation from -40°C to 85°C.
Function Tables
SN65LVDS32A and SN65LVDT32A
DIFFERENTIAL INPUT
A-B
VID
≥
-70 mV
-100 mV < VID
≤
-70 mV
VID
≤
-100 mV
X
Open
ENABLES
G
H
X
H
X
H
X
L
H
X
G
X
L
X
L
X
L
H
X
L
OUTPUT
Y
H
H
?
?
L
L
Z
H
H
H = high level, L = low level, X = irrelevant,
Z = high impedance (off), ? = indeterminate
SN65LVDS3486A and SN65LVDT3486A
DIFFERENTIAL INPUT
A-B
VID
≥
-70 mV
-100 mV < VID
≤
-70 mV
VID
≤
-100 mV
X
Open
ENABLES
EN
H
H
H
L
H
OUTPUT
Y
H
?
L
Z
H
H = high level, L = low level, X = irrelevant,
Z = high impedance (off), ? = indeterminate
2
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
SN65LVDS32A, SN65LVDT32A, SN65LVDS3486A
SN65LVDT3486A, SN65LVDS9637A, SN65LVDT9637A
HIGH SPEED DIFFERENTIAL RECEIVERS
SLLS368E − JULY 1999 − REVISED JUNE 2001
Function Tables (Continued)
SN65LVDS9637A and SN65LVDT9637A
DIFFERENTIAL INPUT
A-B
VID
≥
-70 mV
-100 mV < VID
≤
-70 mV
VID
≤
-100 mV
Open
H = high level,
L = low level,
OUTPUT
Y
H
?
L
H
? = indeterminate
equivalent input and output schematic diagrams
VCC
Attenuation
Network
VCC
Attenuation
Network
Attenuation
Network
A Input
B Input
7V
7V
7V
7V
LVDT Only 110
Ω
VCC
VCC
300 kΩ
(G Only)
50
Ω
Enable
Inputs
7V
37
Ω
Y Output
7V
300 kΩ
(EN and G Only)
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
3
SLLS368E − JULY 1999 − REVISED JUNE 2001
SN65LVDS32A, SN65LVDT32A, SN65LVDS3486A
SN65LVDT3486A, SN65LVDS9637A, SN65LVDT9637A
HIGH SPEED DIFFERENTIAL RECEIVERS
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
†
Supply voltage range, V
CC
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4 V
Voltage range: Enables or Y . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
CC
+ 3 V
A or B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −4 V to 6 V
Bus-pin (A, B) electrostatic discharge (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
Continuous power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
2. Tested in accordance with MIL-STD-883C Method 3015.7.
DISSIPATION RATING TABLE
PACKAGE
D8
D16
TA
≤
25°C
POWER RATING
725 mW
950 mW
OPERATING FACTOR‡
ABOVE TA = 25°C
5.8 mW/°C
7.6 mW/°C
TA = 85°C
POWER RATING
377 mW
494 mW
‡ This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with
no air flow.
recommended operating conditions
MIN
Supply voltage, VCC
High-level input voltage, VIH
Low-level input voltage, VIL
Common-mode input voltage, VIC
Operating free-air temperature, TA
Enables
Enables
0.1
−2
−40
3
2
0.8
3
4.4
85
NOM
3.3
MAX
3.6
UNIT
V
V
V
V
V
°C
Magnitude of differential input voltage,
V
ID
4
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