PCA9554D,112 datasheet, PDF - EEWORLD Datasheet

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PCA9554D,112: Description8 I/O, PIA-GENERAL PURPOSE, PDSO16; CategoryThe embedded processor and controller Microcontrollers and processors; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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PCA9554D,112 Overview

8 I/O, PIA-GENERAL PURPOSE, PDSO16

PCA9554D,112 Parametric

Parameter Name	Attribute value
Brand Name	NXP Semiconduc
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	SOP
package instruction	SOP, SOP16,.4
Contacts	16
Manufacturer packaging code	SOT162-1
Reach Compliance Code	compli
JESD-30 code	R-PDSO-G16
JESD-609 code	e4
length	10.3 mm
Humidity sensitivity level	1
Number of digits	8
Number of I/O lines	8
Number of ports	1
Number of terminals	16
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP16,.4
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
power supply	2.5/5 V
Certification status	Not Qualified
Maximum seat height	2.65 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	2.3 V
Nominal supply voltage	3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	7.5 mm
uPs/uCs/peripheral integrated circuit type	PARALLEL IO PORT, GENERAL PURPOSE

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PCA9554; PCA9554A

8-bit I

C-bus and SMBus I/O port with interrupt

Rev. 8 — 26 July 2011

Product data sheet

1. General description

The PCA9554 and PCA9554A are 16-pin CMOS devices that provide 8 bits of General

Purpose parallel Input/Output (GPIO) expansion for I

C-bus/SMBus applications and

were developed to enhance the NXP Semiconductors family of I

C-bus I/O expanders.

The improvements include higher drive capability, 5 V I/O tolerance, lower supply current,

individual I/O configuration, 400 kHz clock frequency, and smaller packaging. I/O

expanders provide a simple solution when additional I/O is needed for ACPI power

switches, sensors, push buttons, LEDs, fans, etc.

The PCA9554/PCA9554A consist of an 8-bit Configuration register (Input or Output

selection); 8-bit Input Port register, 8-bit Output Port register and an 8-bit Polarity

Inversion register (active HIGH or active LOW operation). The system master can enable

the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for

each input or output is kept in the corresponding Input Port or Output Port register. The

polarity of the read register can be inverted with the Polarity Inversion register. All

registers can be read by the system master. Although pin-to-pin and I

C-bus address

compatible with the PCF8574 series, software changes are required due to the

enhancements and are discussed in

Application Note AN469.

The PCA9554/PCA9554A open-drain interrupt output is activated when any input state

differs from its corresponding Input Port register state and is used to indicate to the

system master that an input state has changed. The power-on reset sets the registers to

their default values and initializes the device state machine.

Three hardware pins (A0, A1, A2) vary the fixed I

C-bus address and allow up to eight

devices to share the same I

C-bus/SMBus. The PCA9554A is identical to the PCA9554

except that the fixed I

C-bus address is different allowing up to sixteen of these devices

(eight of each) on the same I

C-bus/SMBus.

2. Features and benefits



Operating power supply voltage range of 2.3 V to 5.5 V

5 V tolerant I/Os

Polarity Inversion register

Active LOW interrupt output

Low standby current

Noise filter on SCL/SDA inputs

No glitch on power-up

Internal power-on reset

8 I/O pins which default to 8 inputs

0 Hz to 400 kHz clock frequency

PCA9554D,112 Related Products

	PCA9554D,112	PCA9554PW/G,118	PCA9554D/G,528	PCA9554AD/G,518	PCA9554ABS,115	PCA9554ADB,112	PCA9554APW/G,118	PCA9554DB,112	PCA9554DB/G,118
Description	8 I/O, PIA-GENERAL PURPOSE, PDSO16	8 I/O, PIA-GENERAL PURPOSE, PQCC16	8 I/O, PIA-GENERAL PURPOSE, PQCC16	8 I/O, PIA-GENERAL PURPOSE, PQCC16	8 I/O, PIA-GENERAL PURPOSE, PQCC16	8 I/O, PIA-GENERAL PURPOSE, PDSO16	8 I/O, PIA-GENERAL PURPOSE, PQCC16	8 I/O, PIA-GENERAL PURPOSE, PDSO16	8 I/O, PIA-GENERAL PURPOSE, PQCC16
Brand Name	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc
Maker	NXP	NXP	NXP	NXP	NXP	NXP	NXP	NXP	NXP
Parts packaging code	SOP	TSSOP	SOP	SOP	QFN	SSOP1	TSSOP	SSOP1	SSOP1
package instruction	SOP, SOP16,.4	TSSOP,	SOP,	7.50 MM, PLASTIC, MS-013, SOT162-1, SOP-16	HVQCCN,	SSOP, SSOP16,.3	4.40 MM, PLASTIC, MO-153, SOT403-1, TSSOP-16	SSOP, SSOP16,.3	SSOP,
Contacts	16	16	16	16	16	16	16	16	16
Manufacturer packaging code	SOT162-1	SOT403-1	SOT162-1	SOT162-1	SOT629-1	SOT338-1	SOT403-1	SOT338-1	SOT338-1
Reach Compliance Code	compli	unknow	unknow	unknow	unknow	compli	unknow	compli	unknow
JESD-30 code	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	S-PQCC-N16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16
JESD-609 code	e4	e4	e4	e4	e4	e4	e4	e4	e4
length	10.3 mm	5 mm	10.3 mm	10.3 mm	4 mm	6.2 mm	5 mm	6.2 mm	6.2 mm
Number of I/O lines	8	8	8	8	8	8	8	8	8
Number of ports	1	1	1	1	1	1	1	1	1
Number of terminals	16	16	16	16	16	16	16	16	16
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	TSSOP	SOP	SOP	HVQCCN	SSOP	TSSOP	SSOP	SSOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	SQUARE	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH
Maximum seat height	2.65 mm	1.1 mm	2.65 mm	2.65 mm	1 mm	2 mm	1.1 mm	2 mm	2 mm
Maximum supply voltage	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage	2.3 V	2.3 V	2.3 V	2.3 V	2.3 V	2.3 V	2.3 V	2.3 V	2.3 V
Nominal supply voltage	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD	Nickel/Palladium/Gold (Ni/Pd/Au)	NICKEL PALLADIUM GOLD	Nickel/Palladium/Gold (Ni/Pd/Au)	NICKEL PALLADIUM GOLD
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	NO LEAD	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	1.27 mm	0.65 mm	1.27 mm	1.27 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	QUAD	DUAL	DUAL	DUAL	DUAL
width	7.5 mm	4.4 mm	7.5 mm	7.5 mm	4 mm	5.3 mm	4.4 mm	5.3 mm	5.3 mm
uPs/uCs/peripheral integrated circuit type	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE
Source Url Status Check Date	-	2013-10-15 00:00:00	2013-10-15 00:00:00	2013-10-15 00:00:00	2013-06-14 00:00:00	-	2013-10-15 00:00:00	-	2013-10-15 00:00:00

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