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TC74ACT175F(TP1)

Description
IC ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, 0.300 INCH, PLASTIC, SOIC-16, FF/Latch
Categorylogic    logic   
File Size99KB,4 Pages
ManufacturerToshiba Semiconductor
Websitehttp://toshiba-semicon-storage.com/
Download Datasheet Parametric Compare View All

TC74ACT175F(TP1) Overview

IC ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, 0.300 INCH, PLASTIC, SOIC-16, FF/Latch

TC74ACT175F(TP1) Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerToshiba Semiconductor
Parts packaging codeSOIC
package instructionSOP,
Contacts16
Reach Compliance Codeunknown
seriesACT
JESD-30 codeR-PDSO-G16
JESD-609 codee0
length10.3 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeD FLIP-FLOP
Number of digits4
Number of functions1
Number of terminals16
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)240
propagation delay (tpd)12.5 ns
Certification statusNot Qualified
Maximum seat height1.9 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN LEAD
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger typePOSITIVE EDGE
width5.3 mm
minfmax80 MHz

TC74ACT175F(TP1) Related Products

TC74ACT175F(TP1) TC74ACT175F(EL)
Description IC ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, 0.300 INCH, PLASTIC, SOIC-16, FF/Latch IC ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, 0.300 INCH, PLASTIC, SOIC-16, FF/Latch
Is it Rohs certified? incompatible incompatible
Maker Toshiba Semiconductor Toshiba Semiconductor
Parts packaging code SOIC SOIC
package instruction SOP, SOP,
Contacts 16 16
Reach Compliance Code unknown unknown
series ACT ACT
JESD-30 code R-PDSO-G16 R-PDSO-G16
JESD-609 code e0 e0
length 10.3 mm 10.3 mm
Load capacitance (CL) 50 pF 50 pF
Logic integrated circuit type D FLIP-FLOP D FLIP-FLOP
Number of digits 4 4
Number of functions 1 1
Number of terminals 16 16
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Output polarity COMPLEMENTARY COMPLEMENTARY
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP SOP
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) 240 240
propagation delay (tpd) 12.5 ns 12.5 ns
Certification status Not Qualified Not Qualified
Maximum seat height 1.9 mm 1.9 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V
surface mount YES YES
technology CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL
Terminal surface TIN LEAD TIN LEAD
Terminal form GULL WING GULL WING
Terminal pitch 1.27 mm 1.27 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
Trigger type POSITIVE EDGE POSITIVE EDGE
width 5.3 mm 5.3 mm
minfmax 80 MHz 80 MHz

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