EEWORLDEEWORLDEEWORLD

Part Number

Search

530NA1366M00DGR

Description
LVDS Output Clock Oscillator, 1366MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
CategoryPassive components    oscillator   
File Size215KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance  
Download Datasheet Parametric View All

530NA1366M00DGR Overview

LVDS Output Clock Oscillator, 1366MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530NA1366M00DGR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
Reach Compliance Codeunknown
Other featuresTAPE AND REEL
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability50%
JESD-609 codee4
Manufacturer's serial number530
Installation featuresSURFACE MOUNT
Nominal operating frequency1366 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVDS
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage3.63 V
Minimum supply voltage2.97 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
S i 5 3 0 / 5 31
R
EVISION
D
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.1 6/07
Copyright © 2007 by Silicon Laboratories
Si530/531
On June 2, Hongmeng operating system was released! Huawei officially released HarmonyOS 2
On the evening of June 2nd, Beijing time, Huawei officially released HarmonyOS 2 and a number of new products equipped with HarmonyOS 2. This also means that "mobile phones equipped with HarmonyOS" ha...
qwqwqw2088 Talking
2022 Brushless DC Motor Control Technology Seminar (the most rubbish conference I have ever attended)
Domestic semiconductor manufacturers have not yet shared their presentation PPTs. The demos presented are not very innovative. The most important thing is that lunch is not included. Instead, we were ...
1399866558 Motor Drive Control(Motor Control)
【GD32307E-START】Development practice->Add display to the development board to light up 128*64 LCD
In order to facilitate human-computer interaction and display information, a self-made 128*64LCD dot matrix screen is added to the GD32307E-START development board to facilitate subsequent advanced de...
ylyfxzsx GD32 MCU
How to install virtual machine on SinA33 development board
[i=s]This post was last edited by babyking on 2018-11-30 16:51[/i] [color=#333333][font=微软雅黑][size=18px]Today I got a Corethink development board, model SIN-A33, which uses Allwinner's A33 chip. Unlik...
babyking Linux and Android
How to Make DSP Digital Oscillator Generate Phase-Shifted Sine Wave
There are many ways to generate digital phase-shifted signals. The traditional direct digital frequency synthesis (DDS) phase-shifting principle is to first digitize the sine wave signal and form a da...
Aguilera DSP and ARM Processors
Newbie asks for advice on STC89c54RD+, RAM access value application
STC89c54RD+ defines array xdata a[18] _at_ 0x001d; I can change its value with the keyboard, but after powering on, its value changes randomly. I would like to ask you how to ensure that its value is ...
杨焕勇 51mcu

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号