Low Voltage TVS Diode Array
For ESD & Latch-Up Protection
PROTECTION PRODUCTS
Description
The SLV series of transient voltage suppressors are
designed to protect low voltage semiconductor compo-
nents which are connected to data and transmission
lines from transients caused by electrostatic discharge
(ESD), lightning and other induced voltage surges.
The devices are constructed using Semtechs propri-
etary EPD process technology. The EPD process pro-
vides low standoff voltages with significant reductions
in leakage currents and capacitance over silicon
avalanche diode processes. The SLV series is specifi-
cally designed for protecting low voltage components
such as microprocessors, ASICs, I/O transceivers, and
high speed RAM. They provide ESD and latch-up
protection for power and I/O ports, microprocessor bus
interfaces, high speed data and video transmission
lines, and low power portable and wireless systems.
The SLV series TVS diodes will meet the surge require-
ments of IEC 61000-4-2, Level 4, Human Body
Model for air and contact discharge.
The low clamping voltage of the SLV minimizes the
stress on the protected transceiver. The SO-8 package
allows flexibility in the design of crowded circuit
boards.
SLVDA2.8
Features
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300 watts peak pulse power (tp = 8/20µs)
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Transient protection for data lines to
IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact)
IEC 61000-4-4 (EFT) 40A (5/50ns)
IEC 61000-4-5 (Lightning) 12A (1.2/50µs)
Protects up to four bidirectional lines
Working Voltages: 2.8V & 3.3V
Low leakage current for low power applications
Low operating voltage ideal for latch-up protection
Low capacitance
Low clamping voltage
Solid-state EPD TVS technology
JEDEC SO-8 package
Molding compound flammability rating: UL 94V-0
Marking : Part number, date code, logo
Packaging : Tape and Reel per EIA 481
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Mechanical Characteristics
Applications
ESD and Latch-Up Protection
Analog Inputs
WAN/LAN Equipment
Low Voltage ASICs
Instrumentation
Low Power Systems
Circuit Diagram (Each Line)
Schematic & PIN Configuration
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2
7
3
6
4
5
S0-8 (Top View)
Revision 9/2000
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SLVDA2.8
PROTECTION PRODUCTS
Applications Information
Device Connection for Protection of Four Data Lines
The SLVDA series devices are designed to protect up to
four data lines. The devices are connected as follows:
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LINE 1
LINE 2
LINE 3
LINE 4
I/O Line Protection
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Common mode protection of four data lines is
achieved by connecting data lines at pins 1 - 4.
Pins 5 - 8 are connected to ground (Device is
symmetrical so connections may be reversed to
serve a specific application). The ground connec-
tions should be made directly to the ground plane
for best results. The path length is kept as short
as possible to reduce the effects of parasitic
inductance in the board traces.
Protecting 5V lines: The designer may take advan-
tage of the superior reverse leakage and capaci-
tance characteristics of the SLVDA2.8 to protect
two 5V lines. This is achieved by connecting two
lines of the device in series as shown. The series
connection is made by shorting pins 5 & 6 together
for the first line and pins 7 & 8 for the second line.
Pins 1 & 4 are connected to the lines that are to
be protected. Pins 2 & 3 are connected to ground.
See application note SI96-14 for additional details.
Typical Connection
To Protected
Device
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8
Circuit Board Layout Recommendations for Suppres-
sion of ESD.
Good circuit board layout is critical for the suppression
of ESD induced transients. The following guidelines are
recommended:
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2
7
Ground
3
6
4
5
Place the TVS near the input terminals or connec-
tors to restrict transient coupling.
Minimize the path length between the TVS and the
protected line.
Minimize all conductive loops including power and
ground loops.
The ESD transient return path to ground should be
kept as short as possible.
Never run critical signals near board edges.
Use ground planes whenever possible.
From Connector
Optional Connection for Protecting 5V Lines
ã
2000 Semtech Corp.
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Microcontroller MCU
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