ICS9248YF-128 datasheet, PDF - EEWORLD Datasheet

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ICS9248YF-128: DescriptionProcessor Specific Clock Generator, 133.3MHz, PDSO48, 0.300 INCH, SSOP-48; CategoryThe embedded processor and controller Microcontrollers and processors; File Size185KB，16 Pages; ManufacturerIDT (Integrated Device Technology)

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ICS9248YF-128 Overview

Processor Specific Clock Generator, 133.3MHz, PDSO48, 0.300 INCH, SSOP-48

ICS9248YF-128 Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	SSOP
package instruction	SSOP,
Contacts	48
Reach Compliance Code	compliant
ECCN code	EAR99
Other features	CAN ALSO OPERATE AT 3.3V SUPPLY
JESD-30 code	R-PDSO-G48
JESD-609 code	e0
length	15.875 mm
Number of terminals	48
Maximum operating temperature	70 °C
Minimum operating temperature
Maximum output clock frequency	133.3 MHz
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	225
Master clock/crystal nominal frequency	16 MHz
Certification status	Not Qualified
Maximum seat height	2.794 mm
Maximum supply voltage	2.625 V
Minimum supply voltage	2.375 V
Nominal supply voltage	2.5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	GULL WING
Terminal pitch	0.635 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	7.5 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, PROCESSOR SPECIFIC

ICS9248YF-128 Related Products

	ICS9248YF-128	ICS9248YF-128LF
Description	Processor Specific Clock Generator, 133.3MHz, PDSO48, 0.300 INCH, SSOP-48	Processor Specific Clock Generator, 133.3MHz, PDSO48, 0.300 INCH, SSOP-48
Is it lead-free?	Contains lead	Lead free
Is it Rohs certified?	incompatible	conform to
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	SSOP	SSOP
package instruction	SSOP,	SSOP,
Contacts	48	48
Reach Compliance Code	compliant	compliant
ECCN code	EAR99	EAR99
Other features	CAN ALSO OPERATE AT 3.3V SUPPLY	CAN ALSO OPERATE AT 3.3V SUPPLY
JESD-30 code	R-PDSO-G48	R-PDSO-G48
JESD-609 code	e0	e3
length	15.875 mm	15.875 mm
Number of terminals	48	48
Maximum operating temperature	70 °C	70 °C
Maximum output clock frequency	133.3 MHz	133.3 MHz
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SSOP	SSOP
Package shape	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	225	260
Master clock/crystal nominal frequency	16 MHz	16 MHz
Certification status	Not Qualified	Not Qualified
Maximum seat height	2.794 mm	2.794 mm
Maximum supply voltage	2.625 V	2.625 V
Minimum supply voltage	2.375 V	2.375 V
Nominal supply voltage	2.5 V	2.5 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL
Terminal surface	TIN LEAD	MATTE TIN
Terminal form	GULL WING	GULL WING
Terminal pitch	0.635 mm	0.635 mm
Terminal location	DUAL	DUAL
Maximum time at peak reflow temperature	30	30
width	7.5 mm	7.5 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, PROCESSOR SPECIFIC	CLOCK GENERATOR, PROCESSOR SPECIFIC

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