IDT70121S35J datasheet, PDF - EEWORLD Datasheet

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IDT70121S35J: DescriptionDual-Port SRAM, 2KX9, 35ns, CMOS, PQCC52, 0.750 X 0.750 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-52; Categorystorage storage; File Size182KB，15 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT70121S35J Overview

Dual-Port SRAM, 2KX9, 35ns, CMOS, PQCC52, 0.750 X 0.750 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-52

IDT70121S35J Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	LCC
package instruction	0.750 X 0.750 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-52
Contacts	52
Reach Compliance Code	not_compliant
ECCN code	EAR99
Maximum access time	35 ns
Other features	INTERRUPT FLAG; AUTOMATIC POWER-DOWN
I/O type	COMMON
JESD-30 code	S-PQCC-J52
JESD-609 code	e0
length	19.1262 mm
memory density	18432 bit
Memory IC Type	DUAL-PORT SRAM
memory width	9
Humidity sensitivity level	3
Number of functions	1
Number of ports	2
Number of terminals	52
word count	2048 words
character code	2000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	2KX9
Output characteristics	3-STATE
Exportable	YES
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC52,.8SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	225
power supply	5 V
Certification status	Not Qualified
Maximum seat height	4.57 mm
Maximum standby current	0.015 A
Minimum standby current	2 V
Maximum slew rate	0.25 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	19.1262 mm

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HIGH-SPEED

2K x 9 DUAL-PORT

STATIC RAM

WITH BUSY & INTERRUPT

Features

IDT70121S/L

IDT70125S/L

High-speed access

Commercial: 25/35/45/55ns (max.)

Low-power operation

IDT70121/70125S

Active: 675mW (typ.)

Standby: 5mW (typ.)

IDT70121/70125L

Active: 675mW (typ.)

Standby: 1mW (typ.)

Fully asychronous operation from either port

MASTER IDT70121 easily expands data bus width to 18 bits or more

using SLAVE IDT70125 chip

On-chip port arbitration logic (IDT70121 only)

BUSY

output flag on Master;

BUSY

input on Slave

INT

flag for port-to-port communication

Battery backup operation2V data retention

TTL-compatible, signal 5V (±10%) power supply

Available in 52-pin PLCC

Industrial temperature range (40°C to +85°C) is available for

selected speeds

Description

The IDT70121/IDT70125 are high-speed 2K x 9 Dual-Port Static

RAMs. The IDT70121 is designed to be used as a stand-alone 9-bit Dual-

Port RAM or as a MASTER Dual-Port RAM together with the IDT70125

SLAVE Dual-Port in 18-bit-or-more word width systems. Using the IDT

MASTER/SLAVE Dual-Port RAM approach in 18-bit-or-wider memory

system applications results in full-speed, error-free operation without the

need for additional discrete logic.

Functional Block Diagram

R/W

I/O

- I/O

I/O

Control

BUSY

10L

(1,2)

I/O

-I/O

I/O

Control

BUSY

Address

Decoder

(1,2)

MEMORY

ARRAY

Address

Decoder

10R

R/W

ARBITRATION

INTERRUPT

LOGIC

R/W

INT

(2)

INT

2654 drw 01

(2)

NOTES:

1. 70121 (MASTER):

BUSY

is non-tri-stated push-pull output.

70125 (SLAVE):

BUSY

is input.

INT

is totem-pole output.

JUNE 1999

DSC 2654/8

IDT70121S35J Related Products

	IDT70121S35J	IDT70125L55J	IDT70125S25J	IDT70121L45J	IDT70121S45J	IDT70125L25J
Description	Dual-Port SRAM, 2KX9, 35ns, CMOS, PQCC52, 0.750 X 0.750 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-52	Dual-Port SRAM, 2KX9, 55ns, CMOS, PQCC52, 0.750 X 0.750 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-52	Dual-Port SRAM, 2KX9, 25ns, CMOS, PQCC52, 0.750 X 0.750 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-52	Dual-Port SRAM, 2KX9, 45ns, CMOS, PQCC52, 0.750 X 0.750 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-52	Dual-Port SRAM, 2KX9, 45ns, CMOS, PQCC52, 0.750 X 0.750 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-52	Dual-Port SRAM, 2KX9, 25ns, CMOS, PQCC52, 0.750 X 0.750 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-52
Is it lead-free?	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	LCC	LCC	LCC	LCC	LCC	LCC
package instruction	0.750 X 0.750 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-52	0.750 X 0.750 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-52	0.750 X 0.750 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-52	0.750 X 0.750 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-52	0.750 X 0.750 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-52	0.750 X 0.750 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-52
Contacts	52	52	52	52	52	52
Reach Compliance Code	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
Maximum access time	35 ns	55 ns	25 ns	45 ns	45 ns	25 ns
Other features	INTERRUPT FLAG; AUTOMATIC POWER-DOWN	INTERRUPT FLAG; AUTOMATIC POWER-DOWN; BATTERY BACKUP	INTERRUPT FLAG; AUTOMATIC POWER-DOWN	INTERRUPT FLAG; AUTOMATIC POWER-DOWN; BATTERY BACKUP	INTERRUPT FLAG; AUTOMATIC POWER-DOWN	INTERRUPT FLAG; AUTOMATIC POWER-DOWN; BATTERY BACKUP
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
JESD-30 code	S-PQCC-J52	S-PQCC-J52	S-PQCC-J52	S-PQCC-J52	S-PQCC-J52	S-PQCC-J52
JESD-609 code	e0	e0	e0	e0	e0	e0
length	19.1262 mm	19.1262 mm	19.1262 mm	19.1262 mm	19.1262 mm	19.1262 mm
memory density	18432 bit	18432 bit	18432 bit	18432 bit	18432 bit	18432 bit
Memory IC Type	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM
memory width	9	9	9	9	9	9
Humidity sensitivity level	3	3	3	1	1	3
Number of functions	1	1	1	1	1	1
Number of ports	2	2	2	2	2	2
Number of terminals	52	52	52	52	52	52
word count	2048 words	2048 words	2048 words	2048 words	2048 words	2048 words
character code	2000	2000	2000	2000	2000	2000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
organize	2KX9	2KX9	2KX9	2KX9	2KX9	2KX9
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Exportable	YES	YES	YES	YES	YES	YES
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	QCCJ	QCCJ	QCCJ	QCCJ	QCCJ	QCCJ
Encapsulate equivalent code	LDCC52,.8SQ	LDCC52,.8SQ	LDCC52,.8SQ	LDCC52,.8SQ	LDCC52,.8SQ	LDCC52,.8SQ
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	225	225	225	225	225	225
power supply	5 V	5 V	5 V	5 V	5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	4.57 mm	4.57 mm	4.57 mm	4.57 mm	4.57 mm	4.57 mm
Maximum standby current	0.015 A	0.015 A	0.015 A	0.005 A	0.015 A	0.015 A
Minimum standby current	2 V	2 V	2 V	2 V	2 V	2 V
Maximum slew rate	0.25 mA	0.2 mA	0.26 mA	0.205 mA	0.245 mA	0.22 mA
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)
Terminal form	J BEND	J BEND	J BEND	J BEND	J BEND	J BEND
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD
Maximum time at peak reflow temperature	30	30	30	30	30	30
width	19.1262 mm	19.1262 mm	19.1262 mm	19.1262 mm	19.1262 mm	19.1262 mm

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Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

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