PI3VDP411LSTR
Dual Mode DisplayPort™ to DVI/HDMI™ Electrical Bridge (Level Shifter)
Features
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Description
Pericom Semiconductor’s PI3VDP411LSTR provides the ability
to use a Dual-mode DisplayPort™ transmitter in HDMI™ mode.
This flexibility provides the user a choice of how to connect to
their favorite display. All signal paths accept AC coupled video
signals. The PI3VDP411LSTR converts this AC coupled signal
into an HDMI rev 1.3 compliant signal with proper signal swing.
This conversion is automatic and transparent to the user.
The PI3VDP411LSTR supports up to 2.5Gbps, which provides
12-bits of color depth per channel, as indicated in HDMI rev 1.3.
Converts low-swing AC coupled differential input to
HDMI™ rev 1.3 compliant open-drain current steering Rx
terminated differential output
HDMI Level shifting operation up to 2.5Gbps per lane
(250MHz pixel clock)
Integrated 50-ohm termination resistors for AC-coupled
differential inputs.
Enable/Disable feature to turn off TMDS outputs to enter
low-power state.
Output slew rate control on TMDS outputs to minimize
EMI
Integrated Passive DDC level shifters (3.3V source to 5V
sink)
Transparent operation: no re-timing or configuration
required
Inverted Level shifter for HPD signal from HDMI/DVI
connector
Integrated pull-down on HPD_sink input guarantees "input
low" when no display is plugged in
3.3V Power supply required
TMDS output enable control
ESD protection on all I/O pins
à
4kV HBM
à
±8kV contact ESD protection on the following pins
→ OUT_Dx±
→ SDA_SINK, SCL_SINK
→ HPD_SINK
Packaging (Pb-free & Green available):
à
48 TQFN, 7mm × 7mm (ZBE)
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Pin Configuration (48-Pin TQFN)
HPD_SINK
SDA_SINK
SCL_SINK
DDC_EN
GND
GND
VDD
GND
VDD
GND
IN_D1-
IN_D1+
VDD
IN_D2-
IN_D2+
GND
IN_D3-
IN_D3+
VDD
IN_D4-
IN_D4+
37
36
35
34
33
32
31
30
29
28
27
26
OE#
NC
NC
25
24
23
22
21
20
GND
OUT_D1-
OUT_D1+
VDD
OUT_D2-
OUT_D2+
GND
OUT_D3-
OUT_D3+
VDD
OUT_D4-
OUT_D4+
38
39
40
41
42
43
44
45
46
47
48
1
2
3
4
5
6
7
8
9
10
11
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GND
19
18
17
16
15
14
13
12
SR0
GND
VDD
SR1
GND
NC
SDA_SOURCE
SCL_SOURCE
NC
VDD
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HPD_SOURCE#
PS9113
GND
08/23/11
Dual Mode DisplayPort™ to DVI/HDMI™ Electrical Bridge (Level Shifter)
Block Diagram
OE#
0V
OUTx_D4+
OUTx_D4-
50Ω
INx_D4+
INx_D4-
50Ω
PI3VDP411LSTR
Rx
0V
OUTx_D3+
OUTx_D3-
50Ω
INx_D3+
INx_D3-
50Ω
Rx
0V
OUTx_D2+
OUTx_D2-
50Ω
INx_D2+
INx_D2-
50Ω
Rx
0V
OUTx_D1+
OUTx_D1-
50Ω
INx_D1+
INx_D1-
SR0
SR1
HPD_SOURCE#
50Ω
Rx
HPD
HPD_SINK
100KΩ
DDC_EN (0V to 3.3V)
SDA_Source
SDA_Sink
SCL_Source
SCL_Sink
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PS9113
08/23/11
Dual Mode DisplayPort™ to DVI/HDMI™ Electrical Bridge (Level Shifter)
Pin Description
Pin
1, 5, 12, 18, 24, 27,
31, 36, 37, 43
2, 11, 15, 21, 26, 33,
40, 46
3
4
6, 10, 34, 35
7
PI3VDP411LSTR
Name
GND
V
DD
SR0
SR1
NC
HPD_SOURCE#
I/O Type
POWER
POWER
I
I
O
O
Descriptions
GROUND
POWER, 3.3V ±10%
Slew Rate Control. Acceptable connections to SR0 pin are: resistor
to 3.3V or short to GND. (internal 200KΩ pull-LOW)
Slew Rate Control. Acceptable connections to SR1 pin are: resistor
to 3.3V or short to GND. (internal 200KΩ pull-LOW)
No Connect
HPD_SOURCE#: 0V to 1.0V (nominal) output signal. HPD_Sink
input can be as high as 5V and then HPD_SOURCE# will output
no higher than 1.0V.
3.3V DDC Data I/O. Pulled up by external termination to 3.3V.
Connected to SDA_SINK through voltage limiting integrated
NMOS passgate.
3.3V DDC Data I/O. Pulled up by external termination to 3.3V.
Connected to SCL_SINK through voltage-limiting integrated
NMOS passgate
HDMI 1.3 compliant TMDS output. OUT_D4+ makes a differential
output signal with OUT_D4-.
HDMI 1.3 compliant TMDS output. OUT_D4- makes a differential
output signal with OUT_D4+
HDMI 1.3 compliant TMDS output. OUT_D3+ makes a differential
output signal with OUT_D3-.
HDMI 1.3 compliant TMDS output. OUT_D3- makes a differential
output signal with OUT_D3+
HDMI 1.3 compliant TMDS output. OUT_D2+ makes a differential
output signal with OUT_D2-.
HDMI 1.3 compliant TMDS output. OUT_D2- makes a differential
output signal with OUT_D2+
HDMI 1.3 compliant TMDS output. OUT_D1+ makes a differential
output signal with OUT_D1-.
HDMI 1.3 compliant TMDS output. OUT_D1- makes a differential
output signal with OUT_D1+
Enable for IN_Dx to OUT_Dx level shifter path.
OE#
1
0
IN_D Termination
> 100KΩ
50Ω
OUT_D Outputs
High-Z
Active
8
SDA_SOURCE
I/O
9
13
14
16
17
19
20
22
23
SCL_SOURCE
OUT_D4+
OUT_D4-
OUT_D3+
OUT_D3-
OUT_D2+
OUT_D2-
OUT_D1+
OUT_D1-
I/O
O
O
O
O
O
O
O
O
25
OE#
I
28
SCL_SINK
I/O
5V DDC Clock I/O. Pulled up by external termination to 5V.
Connected to SCL_SOURCE through voltage limiting integrated
NMOS passgate.
3
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PS9113
08/23/11
11-0084
Dual Mode DisplayPort™ to DVI/HDMI™ Electrical Bridge (Level Shifter)
Pin
29
PI3VDP411LSTR
Name
SDA_SINK
I/O Type
I/O
Descriptions
5V DDC Data I/O. Pulled up by external termination to 5V. Con-
nected to SDA_SOURCE through voltage limiting integrated
NMOS passgate.
Low Frequency, 0V to 5V (nominal) input signal. This signal comes
from the TMDS connector. Voltage High indicates “plugged” state;
voltage low indicated “unplugged”. HPD_SINK is pulled down by
an integrated 100K ohm pull-down resistor.
Enables bias voltage to the DDC passgate level shifter gates. (May
be implemented as a bias voltage connection to the DDC pass gates
themselves.)
30
HPD_SINK
I
32
DDC_EN
I
DDC_EN
0V
3.3V
Passgate
Disable
Enable
38
39
41
42
44
45
47
48
IN_D1-
IN_D1+
IN_D2-
IN_D2+
IN_D3-
IN_D3+
IN_D4-
IN_D4+
I
I
I
I
I
I
I
I
Low-swing diff input from DP Tx outputs. IN_D1- makes a differ-
ential pair with IN_D1+.
Low-swing diff input from DP Tx outputs. IN_D1+ makes a dif-
ferential pair with IN_D1-.
Low-swing diff input from DP Tx outputs. IN_D2- makes a differ-
ential pair with IN_D2+.
Low-swing diff input from DP Tx outputs. IN_D2+ makes a dif-
ferential pair with IN_D2-.
Low-swing diff input from DP Tx outputs. IN_D3- makes a differ-
ential pair with IN_D3+.
Low-swing diff input from DP Tx outputs. IN_D3+ makes a dif-
ferential pair with IN_D3-.
Low-swing diff input from DP Tx outputs. IN_D4- makes a differ-
ential pair with IN_D4+.
Low-swing diff input from DP Tx outputs. IN_D4+ makes a dif-
ferential pair with IN_D4-.
11-0084
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PS9113
08/23/11
Dual Mode DisplayPort™ to DVI/HDMI™ Electrical Bridge (Level Shifter)
Absolute Maximum Ratings
(Over operating free-air temperature range)
Item
Supply Voltage to Ground Potential
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature
PI3VDP411LSTR
Rating
5.5V
-0.5V to V
DD
+0.5V
-40 to +85°C
-65 to +150°C
150°C
260°C
Stress beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
Recommended Operation Conditions
Parameter
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Min.
-40
+3.0
Typ.
Max.
+85
+3.6
Unit
°C
V
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PS9113
08/23/11
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