CA91L862A-50IL datasheet, PDF - EEWORLD Datasheet

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CA91L862A-50IL: DescriptionPCI Bus Controller, CMOS, PBGA256, 17 MM, PLASTIC, BGA-256; CategoryThe embedded processor and controller Microcontrollers and processors; File Size2MB，428 Pages; ManufacturerTundra Semiconductor Corp

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CA91L862A-50IL Overview

PCI Bus Controller, CMOS, PBGA256, 17 MM, PLASTIC, BGA-256

CA91L862A-50IL Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Tundra Semiconductor Corp
package instruction	17 MM, PLASTIC, BGA-256
Reach Compliance Code	unknown
Address bus width	32
Bus compatibility	MC68360; MPC860
maximum clock frequency	50 MHz
Drive interface standards	IEEE 1149.1
External data bus width	32
JESD-30 code	S-PBGA-B256
JESD-609 code	e0
length	17 mm
Humidity sensitivity level	3
Number of terminals	256
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Maximum seat height	1.8 mm
Maximum supply voltage	3.46 V
Minimum supply voltage	3.14 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	TIN LEAD
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	17 mm
uPs/uCs/peripheral integrated circuit type	BUS CONTROLLER, PCI

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QSpan II (CA91L862A)

PCI-to-Motorola Processor Bridge Manual

www.tundra.com

Contents

Chapter 1: General Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

1.1

What is the QSpan II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

1.1.1

1.1.2

1.2

1.2.1

1.2.2

1.2.3

1.2.4

1.2.5

1.2.6

1.3

1.4

QSpan II Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

QSpan II verses QSpan. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Bit Ordering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Numeric Conventions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Topographic Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Document Status. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Document Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Related Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Customer Support Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Chapter 2: Functional Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

2.1

2.2

2.3

2.4

2.5

2.6

2.7

2.8

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

The QBus Slave Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

The PCI Target Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

The IDMA Channel. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

The DMA Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

The Register Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

The Interrupt Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

The EEPROM Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Chapter 3: The QBus Slave Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

3.1

3.2

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

QBus Slave Channel Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

QSpan II PCI-to-Motorola Processor Bridge Manual

8091862.MA001.06

CA91L862A-50IL Related Products

	CA91L862A-50IL	CA91L862A-50CE	CA91L862A-40CL	CA91L862A-50IE	CA91L862A-50CL	CA91L862A-40CE
Description	PCI Bus Controller, CMOS, PBGA256, 17 MM, PLASTIC, BGA-256	PCI Bus Controller, CMOS, PBGA256, 27 MM, PLASTIC, BGA-256	PCI Bus Controller, CMOS, PBGA256, 17 MM, PLASTIC, BGA-256	PCI Bus Controller, CMOS, PBGA256, 27 MM, PLASTIC, BGA-256	PCI Bus Controller, CMOS, PBGA256, 17 MM, PLASTIC, BGA-256	PCI Bus Controller, CMOS, PBGA256, 27 MM, PLASTIC, BGA-256
Maker	Tundra Semiconductor Corp	Tundra Semiconductor Corp	Tundra Semiconductor Corp	Tundra Semiconductor Corp	Tundra Semiconductor Corp	Tundra Semiconductor Corp
package instruction	17 MM, PLASTIC, BGA-256	27 MM, PLASTIC, BGA-256	17 MM, PLASTIC, BGA-256	27 MM, PLASTIC, BGA-256	17 MM, PLASTIC, BGA-256	27 MM, PLASTIC, BGA-256
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown
Address bus width	32	32	32	32	32	32
Bus compatibility	MC68360; MPC860	MC68360; MPC860	MC68360; MPC860	MC68360; MPC860	MC68360; MPC860	MC68360; MPC860
maximum clock frequency	50 MHz	50 MHz	40 MHz	50 MHz	50 MHz	40 MHz
Drive interface standards	IEEE 1149.1	IEEE 1149.1	IEEE 1149.1	IEEE 1149.1	IEEE 1149.1	IEEE 1149.1
External data bus width	32	32	32	32	32	32
JESD-30 code	S-PBGA-B256	S-PBGA-B256	S-PBGA-B256	S-PBGA-B256	S-PBGA-B256	S-PBGA-B256
length	17 mm	27 mm	17 mm	27 mm	17 mm	27 mm
Number of terminals	256	256	256	256	256	256
Maximum operating temperature	85 °C	70 °C	70 °C	85 °C	70 °C	70 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	BGA	BGA	BGA	BGA	BGA	BGA
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.8 mm	3.5 mm	1.8 mm	3.5 mm	1.8 mm	3.5 mm
Maximum supply voltage	3.46 V	3.46 V	3.46 V	3.46 V	3.46 V	3.46 V
Minimum supply voltage	3.14 V	3.14 V	3.14 V	3.14 V	3.14 V	3.14 V
Nominal supply voltage	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL
Terminal form	BALL	BALL	BALL	BALL	BALL	BALL
Terminal pitch	1 mm	1.27 mm	1 mm	1.27 mm	1 mm	1.27 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM
width	17 mm	27 mm	17 mm	27 mm	17 mm	27 mm
uPs/uCs/peripheral integrated circuit type	BUS CONTROLLER, PCI	BUS CONTROLLER, PCI	BUS CONTROLLER, PCI	BUS CONTROLLER, PCI	BUS CONTROLLER, PCI	BUS CONTROLLER, PCI

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