AH103
Product Features
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•
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•
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60 – 2700 MHz
+27 dBm P1dB
+46 dBm Output IP3
28.5 dB Gain @ 900 MHz
Excellent ACPR
MTTF > 100 Years
SOIC-8 Pkg w/ heat slug
The Communications Edge
TM
Product Information
High Gain, High Linearity ½ Watt Amplifier
Product Description
The AH103 is a high gain, high linearity ½-Watt
amplifier. This device is comprised of two individual
MMIC amplifiers internally and can be used with an
external interstage match for any of the mobile
infrastructure frequency bands.
The dual-stage
amplifier achieves up to +46 dBm IP3 performance
with 28.5 dB gain.
The device conforms to WJ Communications’ long
history of producing high reliability and quality
components. The AH103 has an associated MTTF of
a minimum of 100 years at a mounting temperature
of 85°C. All devices are 100% RF & DC tested.
The product is targeted for use as driver amplifiers
for wireless infrastructure where high performance
and high linearity are required.
Functional Diagram
1
AMP 2
2
AMP 1
7
8
3
6
4
5
Applications
•
Mobile Infrastructure
•
W-LAN / ISM / RFID
•
MDS / MMDS Infrastructure
Pin No.
1
2
3, 5, 8,
Ground
Backside copper
RF in (Amp1 in)
4
RF out (Amp2 out)
6
Bias 2
7
Function
Amp2 in
Amp1 out / Bias 1
Specifications
Parameter
Frequency Range (2)
Gain
Input Return Loss
Output Return Loss
Output P1dB
Output IP3 (3)
IS-95 Channel Power (4)
@ -45 dBc ACPR
Typical Performance
Units
MHz
dB
dB
dB
dBm
dBm
dBm
dB
V
V
mA
mA
°C
/ W
°C
Min
60
26.5
Typ
800
28.5
20
11
+27
+46
+21
2.9
+4.5
+9
75
200
Max
2700
Parameter
Frequency
S21
S11
S22
Output P1dB
Output IP3
Channel Power
@ -45 dBc ACPR / ACLR
Units
MHz
dB
dB
dB
dBm
dBm
dBm
dB
900
28.5
-15
-11
+27
+46
+21
2.9
Typical
1900
26
-12
-11
+26.5
+45
+20
2140
25
-11
-14
+26.5
+45
+17.2
3.6
2400
24.7
-12
-17
+26
+43.3
+26
+43
Noise Figure
Supply Voltage (Amp1)
Supply Voltage (Amp2)
Operating Current (Amp1)
Operating Current (Amp2)
Thermal Resistance (5)
Junction Temperature (6)
Noise Figure
Supply Bias 1
Supply Bias 2
100
230
20.6
160
3.7
3.5
+4.5 V @ 75 mA
+9 V @ 200 mA
55
170
7. Typical parameters reflect performance in an application circuit.
8. An IS-95 signal is used for 915 / 1960 MHz. A 3GPP W-CDMA signal is used for 2140 MHz.
Test conditions unless otherwise noted.
1. T = 25ºC, Vdd1 = +4.5 V, Vdd2 = +9 V, Frequency = 800 MHz in a tuned application circuit.
2. The frequency of operation & bandwidth is determined by the external interstage match.
3. 3OIP measured with two tones at an output power of +10 dBm/tone separated by 10 MHz. The
suppression on the largest IM3 product is used to calculate the 3OIP using a 2:1 rule.
4. IS-95, 9 Channels Forward, Pk/Avg Ratio = 11.5 dB at a .001% probability
±750 kHz offset, 30 kHz BW, Channel BW = 1.23 MHz, frequency = 880 MHz.
5. The worst-case junction temperature for a given ground tab temperature can be calculated by
multiplying the thermal resistance with the total package power dissipation and adding it to the tab
temperature. ie. At 85°C case temperature for a typical device, the worst-case junction temperature
would be = 85°C + (9 V * 0.2 A + 4.5 V * 0.075 A) = 129°C.
6. The junction temperature ensures a minimum MTTF rating of 1 million hours of usage.
Absolute Maximum Rating
Parameter
Operating Case Temperature
Storage Temperature
DC Voltage (pin 2)
DC Voltage (pin 6, 7)
RF Input Power (continuous)
Junction Temperature
Ordering Information
Part No.
AH103
AH103-PCB900
AH103-PCB1750
AH103-PCB1900
AH103-PCB2140
Rating
-40 to +85
°C
-55 to +125
°C
+6 V
+11 V
4 dB above Input P1dB
+220°C
Description
High Gain ½ Watt Amplifier
(available in tape and reel)
0.7 – 1.0 GHz Evaluation Circuit
1.7 – 1.8 GHz Evaluation Circuit
1.8 – 2.0 GHz Evaluation Circuit
2.1 – 2.2 GHz Evaluation Circuit
Specifications and information are subject to change without notice
Operation of this device above any of these parameters may cause permanent damage.
WJ Communications, Inc
•
Phone 1-800-WJ1-4401
•
FAX: 408-577-6621
•
e-mail: sales@wj.com
•
Web site: www.wj.com
November 2003
AH103
The Communications Edge
TM
Product Information
Bill of Materials
All Application Circuits
Ref. Desig.
R1
L2, L3
C6, C10, C12
U1
U2
Component
6.8
Ω
chip resistor
18 nH chip inductor
.018
µF
chip capacitor
WJ AH103 Amplifier
+5V Regulator,
National Semiconductor
NJM78L05
High Gain, High Linearity ½ Watt Amplifier
Application Circuit
5. All components are of size 0603.
6.
Other components not shown above are specific
for the frequency band of interest.
AH103-PCB900
700 – 1000 MHz App. Circuit
Ref. Desig.
L1
L4
C1
C5, C11
C7
C9
C2, C3, C4, C8
Component
10 nH chip inductor
5.6 nH chip inductor
0
Ω
chip resistor
5.6 pF chip capacitor
10 pF chip capacitor
1.5 pF chip capacitor
DNP
Notes:
1. DNP = Do not place this component.
2. Distance “D1” measured from U1, pin 4 to edge of Cx (where x = 2, 3, or 4).
a.
D1 = 0.620” to C2 (for use with AH103-PCB1750)
The 2.0 pF input tuning capacitor is placed .045” to the left of “C2” shown on the silk
screen. The shunt capacitor is placed directly on the right and adjacent to the input
blocking capacitor C1.
b. D1 = 0.450” to C3 (for use with AH103-PCB1900)
c.
D1 = 0.310” to C4 (for use with AH103-PCB2140)
3. A voltage regulator is used in this circuit (U2) to drop the +9 V to a +5 V usable supply for the first
internal amplifier. It is permissible to remove the regulator and operate the 1
st
amplifier stage
directly off of +5 V supply onto Test Point 1 (TP1). The use of a +5 V supply on the 1
st
amplifier
stage requires a dropping resistor of 6.8
Ω.
4. A +4.5 V supply can also be used to bypass the 6.8
Ω
and can be applied to Test Point 2 (TP2).
AH103-PCB1750
1700 – 1800 MHz App. Circuit
Ref. Desig.
Component
C1, C11
47 pF chip capacitor
C2
2.0 pF chip capacitor
C5
0
Ω
chip resistor
C8
10 pF chip capacitor
C3, C4, C7
DNP
C9, L1, L4
See note (2a) for the proper placement of C2.
Evaluation Board PCB Layout
AH103-PCB1900
1800 – 2000 MHz App. Circuit
Ref. Desig.
C1, C11
C3
C5
C8
C2, C4, C7
C9, L1, L4
Component
47 pF chip capacitor
1.5 pF chip capacitor
0
Ω
chip resistor
10 pF chip capacitor
DNP
AH103-PCB2140
2110 – 2140 MHz App. Circuit
Ref. Desig.
C1, C11
C4
C5
C8
C2, C3. C7
C9, L1, L4
Component
47 pF chip capacitor
1.2 pF chip capacitor
0
Ω
chip resistor
10 pF chip capacitor
DNP
Circuit Board Material: .014” FR-4, 4 layers, .062” total thickness
2.4 – 2.7 GHz Reference Circuit
Ref. Desig.
L1
C1
C5
C8
C11
C2, C3. C4
C7, C9, L4
WJ Communications, Inc
•
Phone 1-800-WJ1-4401
•
FAX: 408-577-6621
•
e-mail: sales@wj.com
•
Web site: www.wj.com
Component
1 pF chip capacitor
0
Ω
chip resistor
22 pF chip capacitor
10 pF chip capacitor
47 pF chip capacitor
DNP
Specifications and information are subject to change without notice
November 2003
AH103
The Communications Edge
TM
Product Information
High Gain, High Linearity ½ Watt Amplifier
Application Circuit: 700 – 1000 MHz
(AH103-PCB900)
Typical RF Performance
Frequency
S21 – Gain
S11 – Input Return Loss
S22 – Output Return Loss
Output P1dB
Output IP3
(+10 dBm / tone, 1 MHz spacing)
Application Circuit: 1.8 – 2.0 GHz
(AH103-PCB1900)
Typical RF Performance
Frequency
S21 – Gain
S11 – Input Return Loss
S22 – Output Return Loss
Output P1dB
Output IP3
(+10 dBm / tone, 1 MHz spacing)
880 MHz
28.5 dB
-15 dB
-11 dB
+27 dBm
+45 dBm
+21 dBm
2.9 dB
+4.5 V @ 75 mA
+9 V @ 200 mA
1960 MHz
26 dB
-12 dB
-11 dB
+26.5 dBm
+45 dBm
+20 dBm
3.7 dB
+4.5 V @ 75 mA
+9 V @ 200 mA
IS-95 Channel Power
@ -45 dBc ACPR
IS-95 Channel Power
@ -45 dBc ACPR
Noise Figure
Supply Bias (Amp 1)
Supply Bias (Amp 2)
Noise Figure
Supply Bias (Amp 1)
Supply Bias (Amp 2)
S-Parameters
30
25
20
15
30
25
20
S-Parameters
Magnitude (dB)
10
5
0
-5
-10
-15
-20
-25
-30
0.6
0.7
0.8
0.9
1
Frequency (GHz)
1.1
1.2
DB(|S[1,1]|)
DB(|S[2,1]|)
DB(|S[2,2]|)
Magnitude (dB)
15
10
5
0
-5
-10
-15
-20
1.6
1.7
1.8
1.9
2
Frequency (GHz)
2.1
2.2
DB(|S[1,1]|)
DB(|S[2,1]|)
DB(|S[2,2]|)
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
10
880 MHz ACPR vs Channel Power
Single Carrier and 4-Carrier IS-95
Single Carrier
4 Carrier
12
14
16
18
20
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
10
1960 MHz ACPR vs Channel Power
Single Carrier and 4-Carrier IS-95
ACPR (dBc)
ACPR (dBc)
Single Carrier
4 Carrier
12
14
16
18
20
Channel Output Power (dBm)
Single Carrier Signal:
IS-95, 9 Channels Forward, Pk/Avg Ratio = 11.5 dB at a .001% probability
±750 kHz offset, 30 kHz bandwidth, Channel BW = 1.23 MHz
Four-Carrier Signal:
IS-95, 9 Channels Forward, Pk/Avg Ratio = 10.2 dB at a .001% probability
±2.60 MHz offset, 30 kHz bandwidth, Channel BW = 4.92 MHz
Channel Output Power (dBm)
Single Carrier Signal:
IS-95, 9 Channels Forward, Pk/Avg Ratio = 11.5 dB at a .001% probability
±885 kHz offset, 30 kHz bandwidth, Channel BW = 1.23 MHz
Four-Carrier Signal:
IS-95, 9 Channels Forward, Pk/Avg Ratio = 10.2 dB at a .001% probability
±2.76 MHz offset, 30 kHz bandwidth, Channel BW = 4.98 MHz
Specifications and information are subject to change without notice
WJ Communications, Inc
•
Phone 1-800-WJ1-4401
•
FAX: 408-577-6621
•
e-mail: sales@wj.com
•
Web site: www.wj.com
November 2003
AH103
The Communications Edge
TM
Product Information
High Gain, High Linearity ½ Watt Amplifier
Application Circuit: 2110 – 2170 MHz
(AH103-PCB2140)
Typical RF Performance
Frequency
S21 – Gain
S11 – Input Return Loss
S22 – Output Return Loss
Output P1dB
Output IP3
(+10 dBm / tone, 1 MHz spacing)
Reference Design: 2.4 – 2.7 GHz
Typical RF Performance
Frequency
S21 – Gain
S11 – Input Return Loss
S22 – Output Return Loss
Output P1dB
Output IP3
(+10 dBm / tone, 1 MHz spacing)
2140 MHz
25 dB
-11 dB
-14 dB
+26.5 dBm
+45 dBm
3.5 dB
+4.5 V @ 75 mA
+9 V @ 200 mA
MHz
dB
dB
dB
dBm
dBm
dB
2400
24.7
-12
-17
+26
+43.3
2700
23.5
-15
-16
+25.2
+41.9
Noise Figure
Supply Bias (Amp 1)
Supply Bias (Amp 2)
Noise Figure
Supply Bias (Amp 1)
Supply Bias (Amp 2)
3.6
3.6
4.5 V @ 75 mA
9 V @ 200 mA
S-Parameters
30
25
20
30
25
20
2.4009 GHz
24.72 dB
S-Parameters
2.7008 GHz
23.53 dB
Magnitude (dB)
Magnitude (dB)
15
10
5
0
-5
-10
-15
-20
1.9
2
2.1
2.2
Frequency (GHz)
2.3
2.4
DB(|S[1,1]|)
DB(|S[2,1]|)
DB (|S[2,2]|)
15
10
5
0
-5
-10
-15
-20
2.2
2.3
2.4
2.5
2.6
Frequency (GHz)
2.7
2.8
2.9
DB(|S[1,1]|)
DB(|S[2,1]|)
DB(|S[2,2]|)
ACPR vs. Channel Power
-40
-45
-50
-55
-60
12
13
14
15
16
17
18
Output Channel Power (dBm)
3GPP W-CDMA, Test Model 1 +64 DPCH, ±5 MHz offset
freq = 2140 MHz
ACPR (dBc)
Specifications and information are subject to change without notice
WJ Communications, Inc
•
Phone 1-800-WJ1-4401
•
FAX: 408-577-6621
•
e-mail: sales@wj.com
•
Web site: www.wj.com
November 2003
AH103
The Communications Edge
TM
Product Information
High Gain, High Linearity ½ Watt Amplifier
Outline Drawing
Product Marking
The component will be marked with an “AH103”
designator followed by a four- or five-digit alpha-
numeric lot code on the top surface of the
package. Tape and reel specifications for this
part is located on the website in the “Application
Notes” section.
ESD / MSL Information
ESD Classification:
Value:
Test:
Standard:
ESD Classification:
Value:
Test:
Standard:
MSL Rating:
Standard:
Class 1B
Passes
!500
V to <1000 V
Human Body Model (HBM)
JEDEC Standard JESD22-A114
Class III
Passes
!500
V to <1000 V
Charged Device Model (CDM)
JEDEC Standard JESD22-C101
Level 1 at +235
°C
convection reflow
JEDEC Standard J-STD-020B
Functional Pin Layout
Pin
1
2
3
4
5
6
7
8
Function
Amp2 input
Amp1 output / Bias Amp1
Ground
RF input (Amp1 input)
Ground
RF output (Amp2 output)
Bias Amp2
Ground
Mounting Configuration / Land Pattern
The backside paddle is the Source and should be
grounded for thermal and electrical purposes. All other
pins should be grounded on the PCB.
Specifications and information are subject to change without notice
WJ Communications, Inc
•
Phone 1-800-WJ1-4401
•
FAX: 408-577-6621
•
e-mail: sales@wj.com
•
Web site: www.wj.com
November 2003
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